Chapter3
world 

所属分类:VHDL/FPGA/Verilog
开发工具:VHDL
文件大小:11770KB
下载次数:3
上传日期:2012-10-07 09:08:04
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说明:  Chapter3文件夹:SOPC Builder应用实例讲解:运行Hello world实验,完整的设计工程文件在Chapter3/new_nios文件夹下
(Chapter3 folder: SOPC Builder application examples to explain: Run Hello world experiments, complete design engineering documents in Chapter3/new_nios file folder)

文件列表:
Chapter3 (0, 2012-06-28)
Chapter3\new_nios (0, 2012-06-28)
Chapter3\new_nios\.sopc_builder (0, 2012-06-28)
Chapter3\new_nios\.sopc_builder\install.ptf (11692, 2009-12-26)
Chapter3\new_nios\.sopc_builder\install2.ptf (4917, 2009-12-26)
Chapter3\new_nios\.sopc_builder\preferences.xml (725, 2009-12-26)
Chapter3\new_nios\DE2_pin.tcl (20274, 2009-06-09)
Chapter3\new_nios\cpu.ocp (840, 2009-12-26)
Chapter3\new_nios\cpu.sdc (5044, 2009-12-26)
Chapter3\new_nios\cpu.vhd (832152, 2009-12-26)
Chapter3\new_nios\cpu_bht_ram.mif (2392, 2009-12-26)
Chapter3\new_nios\cpu_dc_tag_ram.mif (727, 2009-12-26)
Chapter3\new_nios\cpu_ic_tag_ram.mif (1497, 2009-12-26)
Chapter3\new_nios\cpu_jtag_debug_module_sysclk.vhd (5909, 2009-12-26)
Chapter3\new_nios\cpu_jtag_debug_module_tck.vhd (9044, 2009-12-26)
Chapter3\new_nios\cpu_jtag_debug_module_wrapper.vhd (14733, 2009-12-26)
Chapter3\new_nios\cpu_mult_cell.vhd (6649, 2009-12-26)
Chapter3\new_nios\cpu_ociram_default_contents.mif (5878, 2009-12-26)
Chapter3\new_nios\cpu_rf_ram_a.mif (600, 2009-12-26)
Chapter3\new_nios\cpu_rf_ram_b.mif (600, 2009-12-26)
Chapter3\new_nios\cpu_test_bench.vhd (96096, 2009-12-26)
Chapter3\new_nios\db (0, 2012-06-28)
Chapter3\new_nios\db\a_dpfifo_8t21.tdf (3251, 2009-12-26)
Chapter3\new_nios\db\a_fefifo_7cf.tdf (3892, 2009-12-26)
Chapter3\new_nios\db\altsyncram_29f1.tdf (40876, 2009-12-26)
Chapter3\new_nios\db\altsyncram_9tl1.tdf (12554, 2009-12-26)
Chapter3\new_nios\db\altsyncram_9vc1.tdf (38031, 2009-12-26)
Chapter3\new_nios\db\altsyncram_e502.tdf (44611, 2009-12-26)
Chapter3\new_nios\db\altsyncram_f6f1.tdf (9698, 2009-12-26)
Chapter3\new_nios\db\altsyncram_kib1.tdf (28841, 2009-12-26)
Chapter3\new_nios\db\altsyncram_p2f1.tdf (40402, 2009-12-26)
Chapter3\new_nios\db\altsyncram_pkf1.tdf (6329, 2009-12-26)
Chapter3\new_nios\db\altsyncram_q0g1.tdf (15440, 2009-12-26)
Chapter3\new_nios\db\altsyncram_q2f1.tdf (40402, 2009-12-26)
Chapter3\new_nios\db\altsyncram_qed1.tdf (38680, 2009-12-26)
Chapter3\new_nios\db\altsyncram_t072.tdf (45267, 2009-12-26)
Chapter3\new_nios\db\cntr_fjb.tdf (3469, 2009-12-26)
Chapter3\new_nios\db\cntr_rj7.tdf (3447, 2009-12-26)
Chapter3\new_nios\db\decode_aoi.tdf (3435, 2009-12-26)
Chapter3\new_nios\db\ded_mult_2o81.tdf (3122, 2009-12-26)
... ...

Readme - Hello World Software Example DESCRIPTION: Simple program that prints "Hello from Nios II" REQUIREMENTS: This example will run on the following Nios II designs, targeting the Nios Stratix & Cyclone development boards: - Standard - Full Featured - Fast - Low Cost The memory footprint of this hosted application is ~69 kbytes by default using the standard reference deisgn. For a reduced footprint version of this template, and an explanation of how to reduce the memory footprint for a given application, see the "small_hello_world" template. PERIPHERALS USED: This example exercises the following peripherals: - STDOUT device (UART or JTAG UART) SOFTWARE SOURCE FILES: This example includes the following software source files: - hello_world.c: Everyone needs a Hello World program, right? BOARD/HOST REQUIREMENTS: This example requires only a JTAG connection with a Nios Development board. If the host communication settings are changed from JTAG UART (default) to use a conventional UART, a serial cable between board DB-9 connector and the host is required.

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