Verilog-Reference-routines
所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：2489KB
下载次数：5
上传日期：2012-11-03 09:47:11
上 传 者：
woheyinger
说明： verilog 参考例程。适合初学者学习，深入浅出，由简到难，逐步深化，各个击破。
(verilog Reference routines.
For beginners learning, easily understood, by Jane to difficult, and gradually deepening, divide and conquer.)
文件列表:
Verilog Reference routines (0, 2012-11-03)
Verilog Reference routines\10、与门 (0, 2012-11-03)
Verilog Reference routines\10、与门\AND_G2.asm.rpt (6427, 2010-10-03)
Verilog Reference routines\10、与门\AND_G2.done (26, 2010-10-03)
Verilog Reference routines\10、与门\AND_G2.dpf (239, 2011-09-11)
Verilog Reference routines\10、与门\AND_G2.fit.rpt (52453, 2010-10-03)
Verilog Reference routines\10、与门\AND_G2.fit.smsg (334, 2010-10-03)
Verilog Reference routines\10、与门\AND_G2.fit.summary (364, 2010-10-03)
Verilog Reference routines\10、与门\AND_G2.flow.rpt (6869, 2010-10-03)
Verilog Reference routines\10、与门\AND_G2.map.rpt (15503, 2010-10-03)
Verilog Reference routines\10、与门\AND_G2.map.summary (303, 2010-10-03)
Verilog Reference routines\10、与门\AND_G2.pin (15385, 2010-10-03)
Verilog Reference routines\10、与门\AND_G2.pof (7869, 2010-10-03)
Verilog Reference routines\10、与门\AND_G2.qpf (1280, 2010-10-03)
Verilog Reference routines\10、与门\AND_G2.qsf (2728, 2011-09-11)
Verilog Reference routines\10、与门\AND_G2.qws (530, 2011-09-11)
Verilog Reference routines\10、与门\AND_G2.tan.rpt (8358, 2010-10-03)
Verilog Reference routines\10、与门\AND_G2.tan.summary (704, 2010-10-03)
Verilog Reference routines\10、与门\AND_G2.v (318, 2011-09-09)
Verilog Reference routines\10、与门\AND_G2.v.bak (379, 2010-10-03)
Verilog Reference routines\10、与门\db (0, 2012-11-03)
Verilog Reference routines\10、与门\db\AND_G2.(0).cnf.cdb (523, 2010-10-03)
Verilog Reference routines\10、与门\db\AND_G2.(0).cnf.hdb (555, 2010-10-03)
Verilog Reference routines\10、与门\db\AND_G2.asm.qmsg (2218, 2010-10-03)
Verilog Reference routines\10、与门\db\AND_G2.asm_labs.ddb (473, 2010-10-03)
Verilog Reference routines\10、与门\db\AND_G2.cbx.xml (88, 2010-10-03)
Verilog Reference routines\10、与门\db\AND_G2.cmp.cdb (1350, 2010-10-03)
Verilog Reference routines\10、与门\db\AND_G2.cmp.hdb (6066, 2010-10-03)
Verilog Reference routines\10、与门\db\AND_G2.cmp.kpt (337, 2010-10-03)
Verilog Reference routines\10、与门\db\AND_G2.cmp.logdb (4, 2010-10-03)
Verilog Reference routines\10、与门\db\AND_G2.cmp.rdb (11122, 2010-10-03)
Verilog Reference routines\10、与门\db\AND_G2.cmp.tdb (1128, 2010-10-03)
Verilog Reference routines\10、与门\db\AND_G2.cmp0.ddb (14372, 2010-10-03)
Verilog Reference routines\10、与门\db\AND_G2.db_info (151, 2010-10-03)
Verilog Reference routines\10、与门\db\AND_G2.eco.cdb (175, 2011-09-11)
Verilog Reference routines\10、与门\db\AND_G2.fit.qmsg (17353, 2010-10-03)
Verilog Reference routines\10、与门\db\AND_G2.hier_info (75, 2010-10-03)
Verilog Reference routines\10、与门\db\AND_G2.hif (754, 2010-10-03)
Verilog Reference routines\10、与门\db\AND_G2.lpc.html (430, 2010-10-03)
Verilog Reference routines\10、与门\db\AND_G2.lpc.rdb (399, 2010-10-03)
... ...
This folder contains data for incremental compilation.
The compiled_partitions sub-folder contains previous compilation results for each partition.
As long as this folder is preserved, incremental compilation results from earlier compiles
can be re-used. To perform a clean compilation from source files for all partitions, both
the db and incremental_db folder should be removed.
The imported_partitions sub-folder contains the last imported QXP for each imported partition.
As long as this folder is preserved, imported partitions will be automatically re-imported
when the db or incremental_db/compiled_partitions folders are removed.
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