xapp290
所属分类：VHDL/FPGA/Verilog
开发工具：Windows_Unix
文件大小：2494KB
下载次数：125
上传日期：2006-07-31 21:24:53
上 传 者：
sk2400
说明： 从Xilinx网站上下的，学习FPGA部分动态重配置很好的例子。
(from across the Xilinx website, learning some FPGA dynamic reconfigurable good example.)
文件列表:
xapp290 (0, 2006-01-06)
xapp290\bus_macros (0, 2006-01-06)
xapp290\bus_macros\angle_delimiter (0, 2006-01-06)
xapp290\bus_macros\angle_delimiter\bm_4b_s2.nmc (2364, 2004-02-04)
xapp290\bus_macros\angle_delimiter\bm_4b_s2e.nmc (2245, 2004-06-23)
xapp290\bus_macros\angle_delimiter\bm_4b_v.nmc (2360, 2004-01-28)
xapp290\bus_macros\angle_delimiter\bm_4b_v2.nmc (2314, 2004-01-28)
xapp290\bus_macros\angle_delimiter\bm_4b_v2p.nmc (2315, 2004-01-28)
xapp290\bus_macros\angle_delimiter\bm_4b_ve.nmc (2239, 2004-01-28)
xapp290\bus_macros\paran_delimiter (0, 2006-01-06)
xapp290\bus_macros\paran_delimiter\bm_4b_s2.nmc (2364, 2004-06-18)
xapp290\bus_macros\paran_delimiter\bm_4b_s2e.nmc (2242, 2004-06-18)
xapp290\bus_macros\paran_delimiter\bm_4b_v.nmc (2360, 2004-06-18)
xapp290\bus_macros\paran_delimiter\bm_4b_v2.nmc (2314, 2004-06-18)
xapp290\bus_macros\paran_delimiter\bm_4b_v2p.nmc (2315, 2004-06-18)
xapp290\bus_macros\paran_delimiter\bm_4b_ve.nmc (2239, 2004-06-18)
xapp290\bus_macros\square_delimiter (0, 2006-01-06)
xapp290\bus_macros\square_delimiter\bm_4b_s2.nmc (2364, 2004-06-18)
xapp290\bus_macros\square_delimiter\bm_4b_s2e.nmc (2242, 2004-06-18)
xapp290\bus_macros\square_delimiter\bm_4b_v.nmc (2360, 2004-06-18)
xapp290\bus_macros\square_delimiter\bm_4b_v2.nmc (2314, 2004-06-18)
xapp290\bus_macros\square_delimiter\bm_4b_v2p.nmc (2315, 2004-06-18)
xapp290\bus_macros\square_delimiter\bm_4b_ve.nmc (2239, 2004-06-18)
xapp290\difference_based (0, 2006-01-06)
xapp290\difference_based\alu_mult (0, 2006-01-06)
xapp290\difference_based\alu_mult\add.v (268, 2003-09-15)
xapp290\difference_based\alu_mult\alu_mult.bgn (7110, 2003-11-07)
xapp290\difference_based\alu_mult\alu_mult.bit (215934, 2003-11-07)
xapp290\difference_based\alu_mult\alu_mult.bld (714, 2003-11-07)
xapp290\difference_based\alu_mult\alu_mult.cmd_log (537, 2003-11-07)
xapp290\difference_based\alu_mult\alu_mult.dhp (2237, 2003-11-07)
xapp290\difference_based\alu_mult\alu_mult.drc (38, 2003-11-07)
xapp290\difference_based\alu_mult\alu_mult.lso (6, 2003-11-07)
xapp290\difference_based\alu_mult\alu_mult.mrp (20789, 2003-11-07)
xapp290\difference_based\alu_mult\alu_mult.nc1 (37, 2003-11-07)
xapp290\difference_based\alu_mult\alu_mult.ncd (30400, 2003-11-07)
xapp290\difference_based\alu_mult\alu_mult.ngc (50624, 2003-11-07)
xapp290\difference_based\alu_mult\alu_mult.ngd (91751, 2003-11-07)
xapp290\difference_based\alu_mult\alu_mult.ngm (197134, 2003-11-07)
xapp290\difference_based\alu_mult\alu_mult.ngr (33360, 2003-11-07)
... ...
==========================================================
Disclaimer:
These reference designs were created using ISE 6.1.02i. Previous versions of ISE 6.1i are not supported with these designs.
Additionally, the design is not supported with ISE 5.x, but may work if design changes are made (see Notes below).
==========================================================
General Description:
This ALU Partial Reconfiguration Example demonstrates the two main ways to create partial reconfiguration bitstreams.
The difference-based and module-based examples can be found in their respective folders. Addtionally, bus macros for
Virtex architectures can be found in the bus_macros folder.
For any questions or problems with this example design, please open a WebCase with the Xilinx Hotline at:
http://www.xilinx.com/support/clearexpress/websupport.htm
==========================================================
In order to run the module-based example design, use the run_flow.cmd file found in the module_based folder, which
will call the following other CMD files:
Initial Budgeting - NGDBuild is run on the top level design consisting of black boxes
/Top/Initial/initial.cmd
/Top1/Initial/initial.cmd
Active Module Implementation - Each module is run through implementation and the placement and routing is locked down
/Modules/add/active.cmd
/Modules/mult/active.cmd
/Modules/shift/active.cmd
/Modules/sub/active.cmd
Assembly - The published PIMs are stitched together using par guide and a full design is formed
/Top/Assemble/assemble.cmd
/Top1/Assemble/assemble.cmd
==========================================================
In order to run the difference-based example design, the two ISE Projects found in the difference_based folder need
to implemented and then .bit files need to be created for each design. Finally, the create_bits.cmd file found in the
create_bitstreams directory can be run. This CMD file will copy the following files into the create_bitstreams directory:
alu_mult.ncd
alu_mult.bit
alu_shift.ncd
alu_shift.bit
It will then run:
mult_pr.cmd to create a partial bitstream for mult using the full shift bitstream
shift_pr.cmd to create a partial bitstream for shift using the full mult bitstream
===========================================================
Note: To use this example design using the ISE 5.x tools, the following changes need to occur
1. The MODE=RECONFIG AREA GROUP constraint needs to be replaced with ROUTE_AREA=FIXED DISALLOW_BOUNDARY_CROSSING RECONFIG_MODE;
2. The NETGEN command line found in the CMD files needs to replaced with NGDANNO and NGD2VER commmand lines
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