uart1
所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：140KB
下载次数：3
上传日期：2012-12-14 23:58:39
上 传 者：
asqur
说明： this is uart based verilog code for all the beginners
文件列表:
uart1\transcript (104, 2009-07-31)
uart1\uart1.ise (228445, 2009-07-27)
uart1\uart1.ise_ISE_Backup (228445, 2009-07-27)
uart1\uart1.ntrc_log (59, 2009-07-27)
uart1\uart_tx.cmd_log (285, 2009-07-27)
uart1\uart_tx.lfp (146, 2009-07-27)
uart1\uart_tx.lso (6, 2009-07-27)
uart1\uart_tx.ngr (7992, 2009-07-27)
uart1\uart_tx.prj (26, 2009-07-27)
uart1\uart_tx.syr (8407, 2009-07-27)
uart1\uart_tx.ucf (384, 2009-07-27)
uart1\uart_tx.v (2305, 2009-07-27)
uart1\uart_tx.xst (1129, 2009-07-27)
uart1\uart_tx_summary.html (2607, 2009-07-27)
uart1\xst\dump.xst\uart_tx.prj\ntrc.scr (1158, 2009-07-27)
uart1\xst\work\hdllib.ref (57, 2009-07-27)
uart1\xst\work\vlg2B\uart__tx.bin (8683, 2009-07-27)
uart1\_pace.ucf (384, 2009-07-27)
uart1\_xmsgs\xst.xmsgs (1807, 2009-07-27)
uart1\xst\dump.xst\uart_tx.prj\ngx\notopt (0, 2011-07-02)
uart1\xst\dump.xst\uart_tx.prj\ngx\opt (0, 2011-07-02)
uart1\xst\dump.xst\uart_tx.prj\ngx (0, 2011-07-02)
uart1\xst\dump.xst\uart_tx.prj (0, 2011-07-02)
uart1\xst\work\vlg2B (0, 2011-07-02)
uart1\xst\dump.xst (0, 2011-07-02)
uart1\xst\projnav.tmp (0, 2011-07-02)
uart1\xst\work (0, 2011-07-02)
uart1\xst (0, 2011-07-02)
uart1\_xmsgs (0, 2011-07-02)
uart1 (0, 2011-07-02)
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