Verilog_prj
所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：7383KB
下载次数：57
上传日期：2012-12-15 01:35:22
上 传 者：
bailangcn
说明： 特权同学书籍《深入浅出玩转FPGA》的源码
(Privileged students books layman Fun FPGA source)
文件列表:
Verilog_prj (0, 2012-12-15)
Verilog_prj\ex10_iic (0, 2012-12-15)
Verilog_prj\ex10_iic\I2C通信实验.pdf (141000, 2010-06-04)
Verilog_prj\ex10_iic\verilogiic1121 (0, 2012-12-15)
Verilog_prj\ex10_iic\verilogiic1121\db (0, 2012-12-15)
Verilog_prj\ex10_iic\verilogiic1121\db\iic_top.(0).cnf.cdb (1421, 2009-03-17)
Verilog_prj\ex10_iic\verilogiic1121\db\iic_top.(0).cnf.hdb (629, 2009-03-17)
Verilog_prj\ex10_iic\verilogiic1121\db\iic_top.(1).cnf.cdb (19370, 2009-03-17)
Verilog_prj\ex10_iic\verilogiic1121\db\iic_top.(1).cnf.hdb (1814, 2009-03-17)
Verilog_prj\ex10_iic\verilogiic1121\db\iic_top.(2).cnf.cdb (2504, 2009-03-17)
Verilog_prj\ex10_iic\verilogiic1121\db\iic_top.(2).cnf.hdb (816, 2009-03-17)
Verilog_prj\ex10_iic\verilogiic1121\db\iic_top.asm.qmsg (2182, 2009-03-23)
Verilog_prj\ex10_iic\verilogiic1121\db\iic_top.asm_labs.ddb (2536, 2009-03-23)
Verilog_prj\ex10_iic\verilogiic1121\db\iic_top.cbx.xml (89, 2009-03-23)
Verilog_prj\ex10_iic\verilogiic1121\db\iic_top.cmp.cdb (37903, 2009-03-23)
Verilog_prj\ex10_iic\verilogiic1121\db\iic_top.cmp.hdb (12499, 2009-03-23)
Verilog_prj\ex10_iic\verilogiic1121\db\iic_top.cmp.kpt (338, 2009-03-23)
Verilog_prj\ex10_iic\verilogiic1121\db\iic_top.cmp.logdb (4, 2009-03-23)
Verilog_prj\ex10_iic\verilogiic1121\db\iic_top.cmp.rdb (17912, 2009-03-23)
Verilog_prj\ex10_iic\verilogiic1121\db\iic_top.cmp.tdb (30239, 2009-03-23)
Verilog_prj\ex10_iic\verilogiic1121\db\iic_top.cmp0.ddb (66107, 2009-03-23)
Verilog_prj\ex10_iic\verilogiic1121\db\iic_top.db_info (137, 2009-03-17)
Verilog_prj\ex10_iic\verilogiic1121\db\iic_top.eco.cdb (161, 2009-03-23)
Verilog_prj\ex10_iic\verilogiic1121\db\iic_top.fit.qmsg (20842, 2009-03-23)
Verilog_prj\ex10_iic\verilogiic1121\db\iic_top.hier_info (4928, 2009-03-23)
Verilog_prj\ex10_iic\verilogiic1121\db\iic_top.hif (3539, 2009-03-23)
Verilog_prj\ex10_iic\verilogiic1121\db\iic_top.map.cdb (12351, 2009-03-23)
Verilog_prj\ex10_iic\verilogiic1121\db\iic_top.map.hdb (11645, 2009-03-23)
Verilog_prj\ex10_iic\verilogiic1121\db\iic_top.map.logdb (4, 2009-03-23)
Verilog_prj\ex10_iic\verilogiic1121\db\iic_top.map.qmsg (8132, 2009-03-23)
Verilog_prj\ex10_iic\verilogiic1121\db\iic_top.pre_map.cdb (21636, 2009-03-23)
Verilog_prj\ex10_iic\verilogiic1121\db\iic_top.pre_map.hdb (12328, 2009-03-23)
Verilog_prj\ex10_iic\verilogiic1121\db\iic_top.rtlv.hdb (12257, 2009-03-23)
Verilog_prj\ex10_iic\verilogiic1121\db\iic_top.rtlv_sg.cdb (22152, 2009-03-23)
Verilog_prj\ex10_iic\verilogiic1121\db\iic_top.rtlv_sg_swap.cdb (1021, 2009-03-23)
Verilog_prj\ex10_iic\verilogiic1121\db\iic_top.sgdiff.cdb (12898, 2009-03-23)
Verilog_prj\ex10_iic\verilogiic1121\db\iic_top.sgdiff.hdb (13177, 2009-03-23)
Verilog_prj\ex10_iic\verilogiic1121\db\iic_top.sld_design_entry.sci (154, 2009-03-23)
Verilog_prj\ex10_iic\verilogiic1121\db\iic_top.sld_design_entry_dsc.sci (154, 2009-03-23)
Verilog_prj\ex10_iic\verilogiic1121\db\iic_top.smp_dump.txt (941, 2009-03-23)
... ...
This folder contains data for incremental compilation.
The compiled_partitions sub-folder contains previous compilation results for each partition.
As long as this folder is preserved, incremental compilation results from earlier compiles
can be re-used. To perform a clean compilation from source files for all partitions, both
the db and incremental_db folder should be removed.
The imported_partitions sub-folder contains the last imported QXP for each imported partition.
As long as this folder is preserved, imported partitions will be automatically re-imported
when the db or incremental_db/compiled_partitions folders are removed.
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