nano-logic

所属分类VHDL/FPGA/Verilog
开发工具:C/C++
文件大小:720KB
下载次数:5
上传日期:2013-01-02 21:15:27
上 传 者yjwpm
说明:  本手册适用于使用NANO-LOGIC CPLD 系列开发板的用户。 一款较高端FPGA 开发板既可以做项目开发也可以配上一个“通用的基础设备接口 板”作为新人培训入门使用 本产品的推出旨在于方便用户扩展基础设备和初学者学习使用。在FPGA 产品的设计 中,在初期调试时为了方便调试和显示程序工作状态,经常会用到大量的调试接口,比 如灯、按键、液晶显示等设备;这些设备既浪费有限的FPGA 资源又浪费宝贵的板卡体 积。本开发板提供了通常用户调试程序所需要的基础输入输出和上位机通讯接口,仅用 了6 个用户IO,扩展了相当于40 多个IO 的用户基础设备。这些用户基础设备可以并行 使用互不干扰。此开发板可以和本公司所用FPGA 产品配合使用,同时本开发板采用了 通用的2.54mm 连接器方便了用户与自己的FPGA 产品进行连接。
(This manual applies to the use the NANO-LOGIC CPLD series development board user. A higher-end FPGA development board can do both project development can also be coupled with a common basis for device interface board as a new training started to use the product launch aimed at expansion of infrastructure and user-friendly for beginners to learn to use. To facilitate debugging and display program work state in the early debugging FPGA design often use a lot of debug interface devices such as lights, buttons, LCD these devices not only a waste of limited FPGA resources and waste valuable board volume. The development board provides the usual user debugger need basic input and output, and PC communication interface, only six user IO, and expansion of the user base is equivalent to more than 40 IO devices. User base device can be used in parallel without disturbing each other. This development board can be used by the Company with the use of FPGA products, at the same time, the developmen)

文件列表:[举报垃圾]
nano-logic用户手册
..................\FPGA开发板与nano-logic通信IP core使用说明.doc,440320,2010-03-29
..................\NANO-LOGIC用户手册.pdf,330148,2010-09-06
..................\红色飓风nano-logic管脚列表.xls,180224,2010-03-27

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