xapp443

所属分类:VHDL/FPGA/Verilog
开发工具:VHDL
文件大小:9449KB
下载次数:19
上传日期:2013-01-10 17:31:30
上 传 者oehyg
说明:  XILINX的一个以太网例程,包含以太网内核的建立以及仿真过程,是XAPP443的例子
(Routines of the XILINX a Ethernet, including Ethernet kernel establish and simulation process XAPP443 example)

文件列表:
mac_hdp_v1_0\PM101_CPLD (0, 2005-07-01)
mac_hdp_v1_0\PM101_CPLD\ml310_cpld.ise (4904, 2005-05-27)
mac_hdp_v1_0\PM101_CPLD\ml310_cpld.ucf (951, 2005-05-27)
mac_hdp_v1_0\PM101_CPLD\ml310_cpld.v (660, 2005-05-27)
mac_hdp_v1_0\PM101_CPLD\pm101_cpld.jed (155929, 2005-05-27)
mac_hdp_v1_0\PM102_CPLD (0, 2005-07-01)
mac_hdp_v1_0\PM102_CPLD\ml310_cpld.jed (258101, 2005-06-21)
mac_hdp_v1_0\chipscope (0, 2005-07-01)
mac_hdp_v1_0\chipscope\gig_hdp.cpj (97233, 2005-06-17)
mac_hdp_v1_0\chipscope\tri_hdp.cpj (96720, 2005-01-26)
mac_hdp_v1_0\chipscope\xgm_hdp.cpj (182254, 2005-02-04)
mac_hdp_v1_0\code (0, 2005-07-01)
mac_hdp_v1_0\code\crc32.h (3367, 2004-11-23)
mac_hdp_v1_0\code\gig_funcs.c (805, 2005-05-17)
mac_hdp_v1_0\code\gig_funcs.h (219, 2005-05-02)
mac_hdp_v1_0\code\hw_demo.c (88667, 2005-06-29)
mac_hdp_v1_0\code\hw_demo.h (5007, 2005-03-17)
mac_hdp_v1_0\code\rocketio.c (15195, 2005-01-19)
mac_hdp_v1_0\code\rocketio.h (1489, 2004-11-23)
mac_hdp_v1_0\code\tri_funcs.c (8769, 2005-05-27)
mac_hdp_v1_0\code\tri_funcs.h (397, 2005-05-27)
mac_hdp_v1_0\code\tui_funcs.c (57875, 2004-11-29)
mac_hdp_v1_0\code\tui_funcs.h (203, 2004-11-25)
mac_hdp_v1_0\code\xgm_funcs.c (1489, 2004-12-03)
mac_hdp_v1_0\code\xgm_funcs.h (218, 2004-11-29)
mac_hdp_v1_0\code\pc (0, 2005-07-01)
mac_hdp_v1_0\code\pc\rtf (0, 2005-06-30)
mac_hdp_v1_0\code\pc\rtf\mac_hdp.exe (1434541, 2005-06-30)
mac_hdp_v1_0\docs (0, 2005-07-01)
mac_hdp_v1_0\docs\xapp443_hdp.pdf (359665, 2005-06-30)
mac_hdp_v1_0\edk (0, 2005-07-01)
mac_hdp_v1_0\edk\drivers (0, 2005-07-01)
mac_hdp_v1_0\edk\drivers\hdp_patgen (0, 2005-07-01)
mac_hdp_v1_0\edk\drivers\hdp_patgen\data (0, 2005-07-01)
mac_hdp_v1_0\edk\drivers\hdp_patgen\data\hdp_patgen_v2_1_0.mdd (501, 2004-11-23)
mac_hdp_v1_0\edk\drivers\hdp_patgen\data\hdp_patgen_v2_1_0.tcl (537, 2004-11-23)
mac_hdp_v1_0\edk\drivers\hdp_patgen\src (0, 2005-07-01)
mac_hdp_v1_0\edk\drivers\hdp_patgen\src\opb_hdp_patgen.c (315, 2004-11-23)
mac_hdp_v1_0\edk\drivers\hdp_patgen\src\Makefile (603, 2004-11-23)
... ...

********************************************************************** ** Disclaimer: LIMITED WARRANTY AND DISCLAMER. These designs are ** provided to you "as is". Xilinx and its licensors make and you ** receive no warranties or conditions, express, implied, ** statutory or otherwise, and Xilinx specifically disclaims any ** implied warranties of merchantability, non-infringement,or ** fitness for a particular purpose. Xilinx does not warrant that ** the functions contained in these designs will meet your ** requirements, or that the operation of these designs will be ** uninterrupted or error free, or that defects in the Designs ** will be corrected. Furthermore, Xilinx does not warrantor ** make any representations regarding use or the results of the ** use of the designs in terms of correctness, accuracy, ** reliability, or otherwise. ** ** LIMITATION OF LIABILITY. In no event will Xilinx or its ** licensors be liable for any loss of data, lost profits,cost ** or procurement of substitute goods or services, or for any ** special, incidental, consequential, or indirect damages ** arising from the use or operation of the designs or ** accompanying documentation, however caused and on any theory ** of liability. This limitation will apply even if Xilinx ** has been advised of the possibility of such damage. This ** limitation shall apply not-withstanding the failure of the ** essential purpose of any limited remedies herein. ** ** Copyright 2004 Xilinx, Inc. ** All rights reserved ** ****************************************************************************** Authors : David Ramsay & Elizabeth Gaunt This readme describes how to use the reference design files that come with XAPP443. The xapp443.zip archive includes the following set of design files: HDL files =============== The following HDL modules in the hdl subdirectory comprise the ISE design example. Together with the EDK project, NGC files and the windows GUI, these files include all the necessary design modules to demonstrate the Ethernet Cores Portfolio on ML310/Ml323/ML401/ML403 evaluation boards. For the 10-Gigabit Ethernet MAC demonstration: - xgm_hdp_top_MLXXX.vhd - xgm_hdp_iob.vhd - xgm_hdp.vhd - xgm_fifo/xgmac_fifo.vhd - xgm_fifo/transmit_fifo.vhd - xgm_fifo/receive_fifo.vhd - xgm_hdvp_xaui.vhd - xgm_hdvp_mgt.vhd For the 1-Gigabit Ethernet MAC demonstration: - gig_hdp_top_MLXXX.vhd - gig_hdp_iob.vhd - gig_hdp.vhd - gig_fifo/gig_fifo.vhd - gig_fifo/tx_fifo.vhd - gig_fifo/rx_fifo.vhd - tri_fifo/tx_client_fifo.vhd - tri_fifo/rx_client_fifo.vhd - tri_fifo/xapp691/src - gig_pcs_pma/gig_pcs_pma.vhd - gig_pcs_pma/transciever.vhd For the Tri_Mode Ethernet MAC demonstration: - tri_hdp_top_MLXXX.vhd - tri_hdp_iob.vhd - tri_hdp.vhd - tri_clk_gen/rgmii_clk_gen.vhd - tri_clk_gen/rgmii_tx_clk_gen.vhd - tri_clk_gen/rgmii_rx_clk_gen.vhd - tri_clk_gen/johnson_cntr.vhd - tri_fifo/tri_fifo.vhd - tri_fifo/tx_fifo.vhd - tri_fifo/rx_fifo.vhd - tri_fifo/tx_client_fifo.vhd - tri_fifo/rx_client_fifo.vhd - tri_fifo/xapp691/src - mac_rgmii.vhd or mac_rgmii_v4.vhd - tri_stats/ethernet_statistics_top.vhd - tri_stats/vector_decode.vhd For the Virtex-4 Embedded Tri-Mode Ethernet MAC demonstration: - emac_hdp_top_ML403.vhd - emac_hdp_iob.vhd - emac_hdp.vhd - tri_fifo/tri_fifo.vhd - tri_fifo/tx_fifo.vhd - tri_fifo/rx_fifo.vhd - tri_fifo/tx_client_fifo.vhd - tri_fifo/rx_client_fifo.vhd - tri_fifo/xapp691/src - emac_mac21.vhd - emac_mac_gmii.vhd - emac_stats/ethernet_statistics_top.vhd - emac_stats/vector_decode.vhd EDK files ============== The demonstration platforms contain a microprocessor system. This is an EDK PowerPC or Microblaze project. The microprocessor submodule is built in EDK giving output files system.vhd, executable.elf and component ngc files. The EDK output files are incorporated into the ISE project. Files provided for the EDK PowerPc project are in the edk subdirectory: - system.xmp - system.mhs - system.mss - drivers/hdp_patgen/ - drivers/xgmac/ - pcores/opb_hdp_patgen/ - pcores/opb_host/ - pcores/plb_icap/ Files provided for the EDK Microblaze project are in the edk_microblaze_v4 subdirectory: - system.xmp - system.mhs - system.mss The Microblaze project also uses the pcores and drivers from the edk subdirectory. Both projects compile the same software for the embedded processor. The code for the embedded processor is in the code subdirectory: - hw_demo.h - crc32.h - xgm_funcs.h - gig_funcs.h - tri_funcs.h - rocketio.h - tui_funcs.h - hw_demo.c - xgm_funcs.c - gig_funcs.c - tri_funcs.c - rocketio.c - tui_funcs.c NGC Files ================== The demonstration platforms incorporate Core Generator Ethernet Cores. These are included in the support files as NGC files. Also included are the chipscope EDN modules used in the designs. In order to build the platforms, hardware evaluation or bought licenses must be obtained for the Ethernet cores in the design. NGC files provided are in the netlists subdirectory: - ethernet_statistics.ngc (the Ethernet Statistics Core v1.1) - gig_mac60.ngc (the 1-Gigabit Ethernet MAC Core v6.0) - gig_pcspma60.ngc (the 1000 Base-X PCS PMA or SGMII Core v6.0) - tri_mac21.ngc (the Tri-mode Ethernet MAC Core v2.1) - xaui6.ngc (the XAUI Core v6.0) - xgm6.ngc (the 10-Gigabit Ethernet MAC Core v6.0) UCF Files ============= UCF files are provided for each demonstration platform in the hdl subdirectory. These include all placement and timing constraints necessary in the design and are evaluation board specific. - xgm_hdp_iob_ML310.ucf - xgm_hdp_iob_ML323.ucf - xgm_hdp_iob_ML323_vp50.ucf - gig_hdp_iob_ML310.ucf - gig_hdp_iob_ML323.ucf - tri_hdp_iob_ML310.ucf - tri_hdp_iob_ML323.ucf - tri_hdp_iob_ML323_vp50.ucf - tri_hdp_iob_ML401.ucf - tri_hdp_iob_ML403.ucf - emac_hdp_iob_ML403.ucf Support Files ================== Documentation for the application note, xapp443_hdp.pdf, can be found in the docs subdirectory. The windows GUI for use with the demonstration platforms is at /code/pc/rtf/mac_hdp.exe. Refer to application note on how to use this. The implement subdirectory contains pre-built .bit and .ace configuration files for each demonstration platform. Also in the implement directory is a script buildall.bat that can be used to rebuild the project. An ISE project file, system.ise, for each demonstration platform can be found in projnav__. These include all the files needed to build each project. Chipscope project files for the demonstrations can be found in the chipscope subdirectory. CPLD programming files for the ML310 personality modules are given in the PM101_CPLD and PM102_CPLD subdirectories.

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