ExampleCode_DAC_AD9122
所属分类：其他嵌入式/单片机内容
开发工具：C/C++
文件大小：98KB
下载次数：34
上传日期：2013-01-30 12:25:50
上 传 者：
success_fxm7114
说明： 高速数模转换器AD9122的单片机ADUC7206配置程序.
(High-speed digital-to-analog converter AD9122 the microcontroller ADUC7206 configuration procedures.)
文件列表:
ExampleCode_DAC_AD9122 (0, 2011-05-25)
ExampleCode_DAC_AD9122\AD9122.c (2062, 2011-05-20)
ExampleCode_DAC_AD9122\ad9122.crf (14033, 2011-05-20)
ExampleCode_DAC_AD9122\ad9122.d (449, 2011-05-20)
ExampleCode_DAC_AD9122\AD9122.h (6093, 2011-05-20)
ExampleCode_DAC_AD9122\ad9122.o (32020, 2011-05-20)
ExampleCode_DAC_AD9122\AD9122Test.axf (21112, 2011-05-20)
ExampleCode_DAC_AD9122\AD9122Test.c (3523, 2011-05-20)
ExampleCode_DAC_AD9122\ad9122test.crf (14316, 2011-05-20)
ExampleCode_DAC_AD9122\ad9122test.d (505, 2011-05-20)
ExampleCode_DAC_AD9122\AD9122Test.hex (6200, 2011-05-20)
ExampleCode_DAC_AD9122\AD9122Test.htm (17572, 2011-05-20)
ExampleCode_DAC_AD9122\AD9122Test.lnp (330, 2011-05-20)
ExampleCode_DAC_AD9122\AD9122Test.map (51384, 2011-05-20)
ExampleCode_DAC_AD9122\ad9122test.o (32512, 2011-05-20)
ExampleCode_DAC_AD9122\AD9122Test.plg (536, 2011-05-20)
ExampleCode_DAC_AD9122\AD9122Test.tra (1088, 2011-05-20)
ExampleCode_DAC_AD9122\AD9122Test.uvopt (58732, 2011-05-20)
ExampleCode_DAC_AD9122\AD9122Test.uvproj (14833, 2011-04-25)
ExampleCode_DAC_AD9122\AD9122Test_Target 1.dep (2338, 2011-05-20)
ExampleCode_DAC_AD9122\AD9122Test_uvopt.bak (58754, 2011-05-20)
ExampleCode_DAC_AD9122\AD9122Test_uvproj.bak (14833, 2011-04-25)
ExampleCode_DAC_AD9122\ADuC7026Driver.c (4931, 2011-05-20)
ExampleCode_DAC_AD9122\aduc7026driver.crf (10273, 2011-05-20)
ExampleCode_DAC_AD9122\aduc7026driver.d (533, 2011-05-20)
ExampleCode_DAC_AD9122\ADuC7026Driver.h (1491, 2011-05-18)
ExampleCode_DAC_AD9122\aduc7026driver.o (32512, 2011-05-20)
ExampleCode_DAC_AD9122\aduc7026_driver.d (509, 2011-04-25)
ExampleCode_DAC_AD9122\ADuC702x.lst (42241, 2011-05-20)
ExampleCode_DAC_AD9122\ADuC702x.o (3044, 2011-05-20)
ExampleCode_DAC_AD9122\ADuC702x.s (16353, 2009-05-07)
EXAMPLE START-UP ROUTINE
There are certain sequences that should be followed to ensure
reliable start-up of the AD9122. This section shows an example
start-up routine assuming the configuration detailed in the
following section.
Device Configuration
The following device configuration is used for this example:
fDATA = 122.88MSPS
Interpolation = 4x, using HB1=10 and
HB2=010010
Input data = Baseband data
fOUT = 140MHz
fREFCLK = 122.88MHz
PLL = Enabled
Fine NCO = Enabled
Inverse SINC Filter = Enabled
Synchronization = Enabled
Silicon Revision = R2
Derived PLL Settings
The following PLL settings can be derived from the device
configuration:
fDACCLK=fDATA*Interpolation=491.52MHz
fVCO = 4*fDACCLK=1966.08MHz (1GHz < fVCO < 2GHz)
N1=fDACCLK/fREFCLK=4
N2=fVCO/fDACCLK=4
Derived NCO Settings
The following NCO settings can be derived from the device
configuration:
fNCO = 2 * fDATA
fCARRIER=fOUT-fMODHB1=140-122.88=17.12MHz
FTW=17.12/(2*122.88)*2^32=0x11D55555
Start-Up Sequence
The following sequences the power clock and register write
sequencing for reliable device start-up:
Power up Device (no specific power supply
sequence is required)
Apply stable REFCLK input signal.
Apply stable DCI input signal.
Issue H/W RESET (Optional)
Device Configuration Register Write Sequence:
0x00 ? 0x20 /* Issue Software Reset */
0x00 ? 0x00
0x0B ? 0x20 /* Start PLL */
0x0C ? 0xE1
0x0D ? 0xD9
0x0A ? 0xCF
0x0A ? 0xA0
/* ??Verify PLL is Locked?? */
Read 0x0E, Expect bit 7 = 0, bit 6 = 1
Read 0x06, Expect 0x5C
0x10 ? 0x48 /* Choose Data Rate Mode */
0x17 ? 0x04 /* Issue Software FIFO Reset */
0x18 ? 0x02
0x18 ? 0x00
/* ??Verify FIFO Reset?? */
Read 0x18, Expect 0x05
Read 0x19, Expect 0x07
0x1B ? 0x84 /* Configure Interpolation Filters */
0x1C ? 0x04
0x1D ? 0x24
0x1E ? 0x01 /* Configure NCO */
0x30 ? 0x55
0x31 ? 0x55
0x32 ? 0xD5
0x33 ? 0x11
0x36 ? 0x01 /* Update Frequency Tuning Word */
0x36 ? 0x00
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