canbus(FPGA)
所属分类：压缩解压
开发工具：Others
文件大小：842KB
下载次数：400
上传日期：2006-09-10 09:17:36
上 传 者：
清风淡
说明： 基于FPGA的can 总线设计，采用verilog语言编写。在FPGA的开发环境下，新建一个工程，然后将本文件中的各个源代码添加进工程里，即可运行仿真。
(FPGA-based bus design can use verilog language. FPGA development environment, a new project, and then the paper all the source code to add the project, Simulation can be run.)
文件列表:
canbus (0, 2006-09-05)
canbus\.untf (0, 2005-01-11)
canbus\__projnav.log (55918, 2005-04-12)
canbus\automake.log (0, 2005-04-12)
canbus\can_acf.v (14640, 2005-04-12)
canbus\can_bsp.v (52576, 2005-04-12)
canbus\can_btl.v (6351, 2005-04-12)
canbus\can_crc.v (658, 2005-04-12)
canbus\can_defines.v (386, 2005-04-13)
canbus\can_fifo.cmd_log (65, 2005-01-11)
canbus\can_fifo.lso (6, 2005-01-11)
canbus\can_fifo.ngc (54214, 2005-01-11)
canbus\can_fifo.ngr (47948, 2005-01-11)
canbus\can_fifo.prj (25, 1980-01-01)
canbus\can_fifo.stx (725, 2005-01-11)
canbus\can_fifo.syr (16270, 2005-01-11)
canbus\can_fifo.v (7987, 2005-04-12)
canbus\can_fifo_vhdl.prj (0, 2005-01-11)
canbus\can_ibo.v (319, 2005-04-12)
canbus\can_register.v (482, 2005-04-12)
canbus\can_register_asyn.v (659, 2005-04-12)
canbus\can_register_asyn_syn.cmd_log (91, 2005-01-11)
canbus\can_register_asyn_syn.lso (6, 2005-01-11)
canbus\can_register_asyn_syn.ngc (5558, 2005-01-11)
canbus\can_register_asyn_syn.ngr (5107, 2005-01-11)
canbus\can_register_asyn_syn.prj (38, 2005-01-11)
canbus\can_register_asyn_syn.stx (725, 2005-01-11)
canbus\can_register_asyn_syn.syr (9939, 2005-01-11)
canbus\can_register_asyn_syn.v (746, 2005-04-12)
canbus\can_register_asyn_syn_vhdl.prj (0, 2005-01-11)
canbus\can_register_syn.v (654, 2005-04-13)
canbus\can_registers.lso (22, 2005-04-12)
canbus\can_registers.prj (131, 2005-04-12)
canbus\can_registers.stx (978, 2005-04-12)
canbus\can_registers.v (29243, 2005-04-12)
canbus\can_registers_vhdl.prj (0, 2005-04-12)
canbus\can_testbench.fdo (603, 2005-01-11)
canbus\can_testbench.ndo (376, 2005-01-11)
canbus\can_testbench.udo (116, 2005-01-11)
canbus\can_testbench.v (51563, 2005-04-12)
... ...
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