DE2_Default
所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：5181KB
下载次数：4
上传日期：2013-02-20 20:01:47
上 传 者：
shuaihanhungry
说明： DE2开发板DEMO源工程，很有参考价值的，也可利用它重新下载到板子上。
(DE2 development board DEMO source project, a good reference value, also can use it to re-download to the board.)
文件列表:
DE2_Default (0, 2012-08-19)
DE2_Default\.sopc_builder (0, 2012-07-14)
DE2_Default\.sopc_builder\filters.xml (66, 2012-04-18)
DE2_Default\.sopc_builder\preferences.xml (498, 2012-04-18)
DE2_Default\AUDIO_DAC.v (8754, 2012-04-18)
DE2_Default\db (0, 2012-08-19)
DE2_Default\db\altsyncram_f6r1.tdf (2860, 2012-07-14)
DE2_Default\db\altsyncram_p132.tdf (106228, 2012-07-14)
DE2_Default\db\DE2_Default.(0).cnf.cdb (12229, 2012-07-14)
DE2_Default\db\DE2_Default.(0).cnf.hdb (6788, 2012-07-14)
DE2_Default\db\DE2_Default.(1).cnf.cdb (1729, 2012-07-14)
DE2_Default\db\DE2_Default.(1).cnf.hdb (1121, 2012-07-14)
DE2_Default\db\DE2_Default.(10).cnf.cdb (1547, 2012-07-14)
DE2_Default\db\DE2_Default.(10).cnf.hdb (578, 2012-07-14)
DE2_Default\db\DE2_Default.(11).cnf.cdb (22219, 2012-07-14)
DE2_Default\db\DE2_Default.(11).cnf.hdb (2060, 2012-07-14)
DE2_Default\db\DE2_Default.(12).cnf.cdb (13096, 2012-07-14)
DE2_Default\db\DE2_Default.(12).cnf.hdb (5532, 2012-07-14)
DE2_Default\db\DE2_Default.(13).cnf.cdb (13097, 2012-07-14)
DE2_Default\db\DE2_Default.(13).cnf.hdb (5532, 2012-07-14)
DE2_Default\db\DE2_Default.(14).cnf.cdb (215247, 2012-07-14)
DE2_Default\db\DE2_Default.(14).cnf.hdb (14362, 2012-07-14)
DE2_Default\db\DE2_Default.(15).cnf.cdb (31809, 2012-07-14)
DE2_Default\db\DE2_Default.(15).cnf.hdb (2411, 2012-07-14)
DE2_Default\db\DE2_Default.(16).cnf.cdb (8095, 2012-07-14)
DE2_Default\db\DE2_Default.(16).cnf.hdb (1890, 2012-07-14)
DE2_Default\db\DE2_Default.(17).cnf.cdb (6729, 2012-07-14)
DE2_Default\db\DE2_Default.(17).cnf.hdb (1883, 2012-07-14)
DE2_Default\db\DE2_Default.(18).cnf.cdb (14373, 2012-07-14)
DE2_Default\db\DE2_Default.(18).cnf.hdb (4464, 2012-07-14)
DE2_Default\db\DE2_Default.(19).cnf.cdb (7735, 2012-07-14)
DE2_Default\db\DE2_Default.(19).cnf.hdb (1878, 2012-07-14)
DE2_Default\db\DE2_Default.(2).cnf.cdb (1854, 2012-07-14)
DE2_Default\db\DE2_Default.(2).cnf.hdb (1214, 2012-07-14)
DE2_Default\db\DE2_Default.(20).cnf.cdb (4555, 2012-07-14)
DE2_Default\db\DE2_Default.(20).cnf.hdb (1456, 2012-07-14)
DE2_Default\db\DE2_Default.(21).cnf.cdb (1989, 2012-08-12)
DE2_Default\db\DE2_Default.(21).cnf.hdb (1050, 2012-08-12)
DE2_Default\db\DE2_Default.(22).cnf.cdb (1702, 2012-08-12)
DE2_Default\db\DE2_Default.(22).cnf.hdb (781, 2012-08-12)
... ...
DE2_Default
-----------
This design is the initial design when the board is powered-up. It increments a counter and displays the value on the
7-segment displays and LEDs. An image is also displayed on the VGA port.
Running the Design
------------------
1) Launch the Quartus II software.
2) Open the DE2_Default.qpf project located in the \DE2_Default folder. (File menu -> Open Project)
3) Open the Programmer window. (Tools menu -> Programmer)
4) The DE2_Default.sof programming file should be listed.
Check the 'Program/Configure' box and set up the JTAG programming hardware connection via the 'Hardware Setup' button.
5) Press 'Start' to start programming. The design should now be programmed and running.
User Inputs to the Design
-------------------------
None.
Compiling the Design
--------------------
1) Launch the Quartus II software.
2) Open the DE2_Default.qpf project located in the \DE2_Default folder. (File menu -> Open Project)
3) Start compilation. (Processing -> Start Compilation)
4) After compilation is finished, you can run the design with the generated SOF file. See 'Running the Design' above.
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