verilog_Manchester
所属分类:VHDL/FPGA/Verilog
开发工具:VHDL
文件大小:1KB
下载次数:22
上传日期:2013-03-05 17:12:02
上 传 者:
摩托
说明: verilog—Manchester 极为简单的曼彻斯特编解码 verilog实现 分为编码和解码两个部分
通过自己测试 同步异步均正常收发
(extremely simple verilog-Manchester Manchester codec verilog achieve synchronization through their own test is divided into two parts of the encoding and decoding Asynchronous were normal transceiver)
文件列表:
verilog—Manchester\md.v (567, 2013-03-05)
verilog—Manchester\me.v (208, 2013-02-06)
verilog—Manchester (0, 2013-03-05)
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