ofdm_system_send
所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：19547KB
下载次数：10
上传日期：2013-03-28 16:39:40
上 传 者：
xingfumxx
说明： 本程序为OFDM发送系统的程序，用的是verilog编写的，可用于ofdm中
(This program is OFDM transmission system program is written in verilog for ofdm)
文件列表:
ofdm_system_send\.lso (6, 2011-05-06)
ofdm_system_send\a.cpj (7578, 2011-05-05)
ofdm_system_send\AutoConstraint_ofdm_system_send.sdc (1715, 2011-05-08)
ofdm_system_send\backup\ofdm_system_send.srr (71569, 2011-05-08)
ofdm_system_send\bram1i.asy (883, 2010-04-27)
ofdm_system_send\bram1i.edn (24172, 2010-04-27)
ofdm_system_send\bram1i.ngo (6059, 2011-05-08)
ofdm_system_send\bram1i.sym (1372, 2010-04-27)
ofdm_system_send\bram1i.v (4966, 2010-04-27)
ofdm_system_send\bram1i.veo (3058, 2010-04-27)
ofdm_system_send\bram1i.vhd (5368, 2010-04-27)
ofdm_system_send\bram1i.vho (3828, 2010-04-27)
ofdm_system_send\bram1i.xco (1848, 2010-04-27)
ofdm_system_send\bram1i_flist.txt (149, 2010-04-27)
ofdm_system_send\bram1r.asy (883, 2010-04-27)
ofdm_system_send\bram1r.edn (24172, 2010-04-27)
ofdm_system_send\bram1r.ngo (6059, 2011-05-08)
ofdm_system_send\bram1r.sym (1372, 2010-04-27)
ofdm_system_send\bram1r.v (4966, 2010-04-27)
ofdm_system_send\bram1r.veo (3058, 2010-04-27)
ofdm_system_send\bram1r.vhd (5368, 2010-04-27)
ofdm_system_send\bram1r.vho (3828, 2010-04-27)
ofdm_system_send\bram1r.xco (1848, 2010-04-27)
ofdm_system_send\bram1r_flist.txt (149, 2010-04-27)
ofdm_system_send\bram2i.asy (883, 2010-04-27)
ofdm_system_send\bram2i.edn (24172, 2010-04-27)
ofdm_system_send\bram2i.ngo (6059, 2011-05-08)
ofdm_system_send\bram2i.sym (1372, 2010-04-27)
ofdm_system_send\bram2i.v (4966, 2010-04-27)
ofdm_system_send\bram2i.veo (3058, 2010-04-27)
ofdm_system_send\bram2i.vhd (5368, 2010-04-27)
ofdm_system_send\bram2i.vho (3828, 2010-04-27)
ofdm_system_send\bram2i.xco (1848, 2010-04-27)
ofdm_system_send\bram2i_flist.txt (149, 2010-04-27)
ofdm_system_send\bram2r.asy (883, 2010-04-27)
ofdm_system_send\bram2r.edn (24172, 2010-04-27)
ofdm_system_send\bram2r.ngo (6059, 2011-05-08)
ofdm_system_send\bram2r.sym (1372, 2010-04-27)
ofdm_system_send\bram2r.v (4966, 2010-04-27)
ofdm_system_send\bram2r.veo (3058, 2010-04-27)
... ...
The following files were generated for 'fft_test' in directory
D:\ofdm_system_send\ofdm_system_send:
wrap_TRIG_ROM.mif:
Memory Initialization File which is automatically generated by the
CORE Generator System for some modules when a simulation flow is
specified. A MIF data file is used to support HDL functional
simulation of modules which use arrays of values.
fft_test.vho:
VHO template file containing code that can be used as a model for
instantiating a CORE Generator module in a VHDL design.
fft_test.veo:
VEO template file containing code that can be used as a model for
instantiating a CORE Generator module in a Verilog design.
fft_test.asy:
Graphical symbol information file. Used by the ISE tools and some
third party tools to create a symbol representing the core.
fft_test.sym:
Please see the core data sheet.
fft_test.ngc:
Binary Xilinx implementation netlist file containing the information
required to implement the module in a Xilinx (R) FPGA.
fft_test.vhd:
Unisim VHDL file containing the information required to simulate
the module.
fft_test.v:
Unisim Verilog file containing the information required to simulate
the module.
fft_test.xco:
CORE Generator input file containing the parameters used to
regenerate a core.
fft_test_flist.txt:
Text file listing all of the output files produced when a customized
core was generated in the CORE Generator.
fft_test_readme.txt:
Text file indicating the files generated and how they are used.
Please see the Xilinx CORE Generator online help for further details on
generated files and how to use them.
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