pll_carrier_syn
所属分类:VHDL/FPGA/Verilog
开发工具:matlab
文件大小:4KB
下载次数:167
上传日期:2013-04-11 09:18:49
上 传 者:
ljl159357
说明: 本程序是锁相环的仿真程序,具有接收端载波同步的功能。注释详尽,程序规范。发端的调制方式有单载波调制,BPSK调制,QPSK调制可供选择。程序中有星座图,锁相环的频差、相差图,以及解调后的基带波形。
(This program is a phase-locked loop simulation program, the with carrier synchronization receiving end function. Notes detailed program specifications. The originator of the modulation scheme to choose a single carrier modulation, BPSK modulation, QPSK modulation. Program constellation diagram, the PLL frequency difference, a difference of FIG, and the demodulated baseband waveform.)
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