uart_state
所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：3233KB
下载次数：9
上传日期：2013-04-23 15:26:51
上 传 者：
xuxinchuan
说明： 基于状态机编写的串口通信实验，编程语言是Verilog HDL，可发送八位数据，在Altera的EP4CE15F17C8芯片上验证成功。（与另一个发送256位不同的是这个代码比较突出状态机的使用）。
(Prepared by the serial communication experiment based on state machine, the programming language is Verilog HDL can transmit eight bits of data, verify on Altera' s EP4CE15F17C8 chip. (Sent with another 256 different code more prominent use of state machines).)
文件列表:
uart_lab\db\logic_util_heursitic.dat (3960, 2013-04-12)
uart_lab\db\prev_cmp_uart.qmsg (7779, 2013-04-12)
uart_lab\db\uart.(0).cnf.cdb (1223, 2013-04-12)
uart_lab\db\uart.(0).cnf.hdb (775, 2013-04-12)
uart_lab\db\uart.(1).cnf.cdb (1899, 2013-04-12)
uart_lab\db\uart.(1).cnf.hdb (780, 2013-04-12)
uart_lab\db\uart.(2).cnf.cdb (6455, 2013-04-12)
uart_lab\db\uart.(2).cnf.hdb (1639, 2013-04-12)
uart_lab\db\uart.(3).cnf.cdb (13719, 2013-04-12)
uart_lab\db\uart.(3).cnf.hdb (2510, 2013-04-12)
uart_lab\db\uart.ace_cmp.bpm (555, 2013-04-12)
uart_lab\db\uart.ace_cmp.cdb (12066, 2013-04-12)
uart_lab\db\uart.ace_cmp.hdb (11781, 2013-04-12)
uart_lab\db\uart.amm.cdb (317, 2013-04-12)
uart_lab\db\uart.asm.qmsg (2214, 2013-04-12)
uart_lab\db\uart.asm.rdb (1343, 2013-04-12)
uart_lab\db\uart.asm_labs.ddb (11018, 2013-04-12)
uart_lab\db\uart.atom.rvd (10034, 2013-04-12)
uart_lab\db\uart.cbx.xml (86, 2013-04-12)
uart_lab\db\uart.cmp.bpm (555, 2013-04-12)
uart_lab\db\uart.cmp.cdb (12066, 2013-04-12)
uart_lab\db\uart.cmp.hdb (11781, 2013-04-12)
uart_lab\db\uart.cmp.kpt (205, 2013-04-12)
uart_lab\db\uart.cmp.logdb (8482, 2013-04-12)
uart_lab\db\uart.cmp.rdb (19913, 2013-04-12)
uart_lab\db\uart.cmp_merge.kpt (209, 2013-04-12)
uart_lab\db\uart.cycloneive_io_sim_cache.31um_ff_1200mv_0c_fast.hsd (746099, 2013-04-12)
uart_lab\db\uart.cycloneive_io_sim_cache.31um_ss_1200mv_0c_slow.hsd (739287, 2013-04-12)
uart_lab\db\uart.cycloneive_io_sim_cache.31um_ss_1200mv_85c_slow.hsd (740794, 2013-04-12)
uart_lab\db\uart.db_info (153, 2013-04-12)
uart_lab\db\uart.eco.cdb (175, 2013-04-12)
uart_lab\db\uart.eda.qmsg (5046, 2013-04-12)
uart_lab\db\uart.fit.qmsg (19213, 2013-04-12)
uart_lab\db\uart.hier_info (7548, 2013-04-12)
uart_lab\db\uart.hif (2757, 2013-04-12)
uart_lab\db\uart.idb.cdb (2216, 2013-04-12)
uart_lab\db\uart.lpc.html (1582, 2013-04-12)
uart_lab\db\uart.lpc.rdb (487, 2013-04-12)
uart_lab\db\uart.lpc.txt (1908, 2013-04-12)
uart_lab\db\uart.map.bpm (523, 2013-04-12)
... ...
This folder contains data for incremental compilation.
The compiled_partitions sub-folder contains previous compilation results for each partition.
As long as this folder is preserved, incremental compilation results from earlier compiles
can be re-used. To perform a clean compilation from source files for all partitions, both
the db and incremental_db folder should be removed.
The imported_partitions sub-folder contains the last imported QXP for each imported partition.
As long as this folder is preserved, imported partitions will be automatically re-imported
when the db or incremental_db/compiled_partitions folders are removed.
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