low-jitter-Clock-IC

所属分类:系统设计方案
开发工具:C/C++
文件大小:88KB
下载次数:4
上传日期:2013-04-28 11:32:39
上 传 者chinabear
说明:  每个数码系统之所以正常准确工作的基础是其心脏 – 时钟序列的无误. 而用来产生时钟信号的资源有许多种: 系统主芯片输出时钟信号, 以MCU微处理器来产生时钟, 以成本较低的晶振来产生时钟信号, 但是还是有很多人不知道或不了解我们还有另外一个选择:用一个集成电路PPL(锁相环)时钟芯片.
(Each of the digital system is the reason why the normal work accurately based on the its heart- clock sequence is correct resources used to generate the clock signal, there are many types: system main chip output clock signal to generate the clock to MCU microprocessor to cost lower crystal to generate the clock signal, but there are still a lot of people do not know or do not know there is another option: an integrated circuit PPL (phase locked loop) clock chip.)

文件列表:
low-jitter Clock IC.pdf (94086, 2013-04-26)

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