fwcode
所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：1030KB
下载次数：5
上传日期：2013-05-02 02:29:38
上 传 者：
SATRAJ5
说明： high-level data link control procedure VERILOG CODE
文件列表:
TxStateMachine.v (5776, 2013-01-22)
TxStateMachine_tb.v (1667, 2013-01-22)
TxTOPModule.v (1411, 2013-01-22)
TxTOPModule_tb.v (1714, 2013-01-22)
ADCBlock.v (834, 2013-01-22)
ADCBlock_tb.v (2233, 2013-01-22)
ADCMUX.v (1103, 2013-01-22)
ADCMUX_tb.v (1633, 2013-01-22)
ChCounter.v (987, 2013-01-22)
ChCounter_tb.v (1157, 2013-01-22)
DataLenCount.v (1071, 2013-01-22)
DataLenCount_tb.v (1163, 2013-01-22)
DataLenCounter.v (1013, 2013-01-22)
DataMux.v (967, 2013-01-22)
DataMux_tb.v (1183, 2013-01-22)
DeFramer.v (1384, 2013-01-22)
DeFramer_tb.v (1839, 2013-01-22)
DMux.v (932, 2013-01-22)
DMux_tb.v (1248, 2013-01-22)
FIFO32x8.v (1653, 2013-01-22)
FIFO32x8_tb.v (1428, 2013-01-22)
FramerBlock.v (1050, 2013-01-22)
FramerBlock_tb.v (2154, 2013-01-22)
RxCRC.v (1586, 2013-01-22)
RxCRC_tb.v (1291, 2013-01-22)
RxShiftRegister.v (1167, 2013-01-22)
RxShiftRegister_tb.v (1254, 2013-01-22)
RxSMC.v (3923, 2013-01-22)
RxSMC_tb.v (1578, 2013-01-22)
RxTOP.v (1389, 2013-01-22)
RxTOP_tb.v (4028, 2013-01-22)
SOPDet.v (1955, 2013-01-22)
SOPDet_tb.v (1249, 2013-01-22)
TxCRC.v (1366, 2013-01-22)
TxCRC_tb.v (1249, 2013-01-22)
TxShiftRegister.v (1152, 2013-01-22)
TxShiftRegister_tb.v (1306, 2013-01-22)
sridevi.docx (329415, 2013-01-22)
synapsis1_sridevi.docx (738625, 2013-01-22)
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