can_exm1_sys
所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：739KB
下载次数：22
上传日期：2013-05-31 15:01:11
上 传 者：
lixers
说明： CAN总线的数据采集，FPGA到USB。verilog hdl语言。
(CAN bus data acquisition, FPGA to the USB. verilog hdl language.)
文件列表:
can_exm1_sys (0, 2013-04-28)
can_exm1_sys\.lso (6, 2013-05-14)
can_exm1_sys\Untitled4 (282, 2013-05-10)
can_exm1_sys\_ngo (0, 2013-05-10)
can_exm1_sys\_ngo\netlist.lst (53, 2013-05-17)
can_exm1_sys\_stx_beh.prj (100, 2013-05-04)
can_exm1_sys\_xmsgs (0, 2013-04-28)
can_exm1_sys\_xmsgs\bitgen.xmsgs (367, 2013-05-17)
can_exm1_sys\_xmsgs\map.xmsgs (895, 2013-05-17)
can_exm1_sys\_xmsgs\ngdbuild.xmsgs (367, 2013-05-17)
can_exm1_sys\_xmsgs\par.xmsgs (3119, 2013-05-17)
can_exm1_sys\_xmsgs\pn_parser.xmsgs (2224, 2013-05-29)
can_exm1_sys\_xmsgs\trce.xmsgs (1720, 2013-05-17)
can_exm1_sys\_xmsgs\xst.xmsgs (2096, 2013-05-16)
can_exm1_sys\baud_gen.prj (27, 2013-05-04)
can_exm1_sys\baud_gen.stx (1166, 2013-05-04)
can_exm1_sys\baud_gen.v (879, 2013-05-04)
can_exm1_sys\baud_gen.xst (146, 2013-05-04)
can_exm1_sys\baud_gen_envsettings.html (10692, 2013-05-29)
can_exm1_sys\baud_gen_isim_beh.exe (82432, 2013-05-04)
can_exm1_sys\baud_gen_stx_beh.prj (99, 2013-05-04)
can_exm1_sys\baud_gen_summary.html (4143, 2013-05-29)
can_exm1_sys\can_exm1.gise (20689, 2013-05-29)
can_exm1_sys\can_exm1.xise (38134, 2013-05-29)
can_exm1_sys\can_rx.prj (25, 2013-05-14)
can_exm1_sys\can_rx.stx (1160, 2013-05-14)
can_exm1_sys\can_rx.v (2922, 2013-05-10)
can_exm1_sys\can_rx.xst (144, 2013-05-14)
can_exm1_sys\can_shiftreg.prj (31, 2013-05-04)
can_exm1_sys\can_shiftreg.stx (1178, 2013-05-04)
can_exm1_sys\can_shiftreg.v (451, 2013-05-04)
can_exm1_sys\can_shiftreg.xst (150, 2013-05-04)
can_exm1_sys\can_top.bgn (5977, 2013-05-17)
can_exm1_sys\can_top.bit (341674, 2013-05-17)
can_exm1_sys\can_top.bld (1010, 2013-05-17)
can_exm1_sys\can_top.cmd_log (6588, 2013-05-17)
can_exm1_sys\can_top.drc (186, 2013-05-17)
can_exm1_sys\can_top.lso (6, 2013-05-16)
can_exm1_sys\can_top.ncd (37198, 2013-05-17)
can_exm1_sys\can_top.ngc (40190, 2013-05-16)
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