c7
所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：19KB
下载次数：2
上传日期：2013-06-23 15:36:40
上 传 者：
huaren
说明： 通信FPGA设计_代码无线通信FPGA设计_代码无线通信FPGA设计_代码
(Communication FPGA design _ code wireless communications wireless communications FPGA design _ code _ FPGA design code)
文件列表:
c7\7-10\cic_dec_8_three.v (1820, 2007-09-17)
c7\7-11\crc_interp_2_single.v (1286, 2007-09-18)
c7\7-12\cic_interp_8_three.v (1988, 2007-09-18)
c7\7-14\dsp48_core.xaw (3519, 2007-09-23)
c7\7-14\hb_filter.v (1992, 2007-09-23)
c7\7-14\lut16_core.xco (1296, 2007-09-23)
c7\7-16\cic2_interp.v (1351, 2007-09-22)
c7\7-16\cic4_interp4.v (1410, 2007-09-23)
c7\7-16\dds.xco (1236, 2007-09-19)
c7\7-16\fir16.v (866, 2007-10-08)
c7\7-16\mydds.v (901, 2007-09-21)
c7\7-16\rcf16.v (3060, 2007-10-08)
c7\7-16\rcf_dsp48.xco (1120, 2007-09-22)
c7\7-16\sender.v (1959, 2007-10-08)
c7\7-16\sender_fir.xco (1220, 2007-09-21)
c7\7-16\sender_modu.v (782, 2007-10-08)
c7\7-16\send_mult.xco (1247, 2007-09-20)
c7\7-18\agc.v (1279, 2007-10-08)
c7\7-2\decimate_4.v (807, 2007-10-09)
c7\7-20\filter_bank.v (1033, 2007-09-23)
c7\7-20\trellis_unit.v (959, 2007-09-23)
c7\7-4\interpolate4.v (814, 2007-10-09)
c7\7-5\rate4to3.v (1014, 2007-10-09)
c7\7-6\polyfilter.v (2617, 2007-09-18)
c7\7-9\crc_interp_2_single.v (1286, 2007-09-18)
c7\7-10 (0, 2013-06-23)
c7\7-11 (0, 2013-06-23)
c7\7-12 (0, 2013-06-23)
c7\7-14 (0, 2013-06-23)
c7\7-16 (0, 2013-06-23)
c7\7-17 (0, 2008-11-04)
c7\7-18 (0, 2013-06-23)
c7\7-2 (0, 2013-06-23)
c7\7-20 (0, 2013-06-23)
c7\7-4 (0, 2013-06-23)
c7\7-5 (0, 2013-06-23)
c7\7-6 (0, 2013-06-23)
c7\7-9 (0, 2013-06-23)
c7 (0, 2013-06-23)
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