coa

所属分类:VHDL/FPGA/Verilog
开发工具:Others
文件大小:446KB
下载次数:5
上传日期:2013-06-30 15:28:00
上 传 者no name
说明:  在Modelsim中实现类MIPS多周期流水化处理器
(In Modelsim achieve class multi-cycle pipelined processor MIPS)

文件列表:
COD_project\Add.v (185, 2011-12-01)
COD_project\ALU_control.v (541, 2011-12-01)
COD_project\ALU_control.v.bak (529, 2011-12-01)
COD_project\And.v (117, 2011-12-01)
COD_project\Control.v (955, 2011-12-01)
COD_project\Control.v.bak (921, 2011-12-01)
COD_project\CPU_design.cr.mti (6553, 2011-12-01)
COD_project\CPU_design.mpf (59348, 2011-12-01)
COD_project\CPU_pro.cr.mti (14073, 2011-12-01)
COD_project\CPU_pro.mpf (59891, 2011-12-01)
COD_project\data.txt (118, 2011-12-01)
COD_project\EX_ALU.v (563, 2011-12-01)
COD_project\EX_ALU.v.bak (564, 2011-12-01)
COD_project\EX_MEM_reg.v (1195, 2011-12-01)
COD_project\EX_MEM_reg.v.bak (1195, 2011-12-01)
COD_project\EX_Mux1.v (408, 2011-12-01)
COD_project\EX_Mux1.v.bak (412, 2011-12-01)
COD_project\EX_Mux2.v (386, 2011-12-01)
COD_project\EX_Mux2.v.bak (390, 2011-12-01)
COD_project\EX_Mux3.v (196, 2011-12-01)
COD_project\EX_Mux3.v.bak (196, 2011-12-01)
COD_project\EX_Mux4.v (228, 2011-12-01)
COD_project\EX_Mux4.v.bak (227, 2011-12-01)
COD_project\Forwarding_unit.v (765, 2011-12-01)
COD_project\Forwarding_unit.v.bak (799, 2011-12-01)
COD_project\ID_EX_reg.v (1770, 2011-12-01)
COD_project\ID_EX_reg.v.bak (1865, 2011-12-01)
COD_project\ID_Hazard.v (381, 2011-12-01)
COD_project\ID_Hazard.v.bak (378, 2011-12-01)
COD_project\IF_ID_reg.v (451, 2011-12-01)
COD_project\IF_ID_reg.v.bak (451, 2011-12-01)
COD_project\IF_IM.v (218, 2011-12-01)
COD_project\IF_IM.v.bak (163, 2011-12-01)
COD_project\MEM_Branch.v (153, 2011-12-01)
COD_project\MEM_Branch.v.bak (2, 2011-12-01)
COD_project\MEM_DM.v (538, 2011-12-01)
COD_project\MEM_DM.v.bak (557, 2011-12-01)
COD_project\MEM_WB_reg.v (883, 2011-12-01)
COD_project\MEM_WB_reg.v.bak (883, 2011-12-01)
COD_project\MUX_ID.v (528, 2011-12-01)
... ...

近期下载者

相关文件


收藏者