blank
所属分类:VHDL/FPGA/Verilog
开发工具:VHDL
文件大小:6427KB
下载次数:36
上传日期:2013-07-19 13:00:44
上 传 者:
DDingDreams
说明: 监控摄像头传入数据,通过芯片TVP5150转换成数字信号,其中sav_check.vhd检测帧头,converter.vhd将信号转换成Y,Cb,Cr格式,最后write_blank.vhd重新组建完整数字信号,最后通过ADV7171转成模拟信号输出到监视器上。这中间,可以对Y做各种图像处理,如滤波处理,均衡处理,只需要在converter之后添加处理文件即可。
(Surveillance camera incoming data through the chip TVP5150 converted into a digital signal, wherein the detection of the header sav_check.vhd, converter.vhd the signal into Y, Cb, Cr format, and finally re-establishment of full write_blank.vhd digital signals, and finally by transfer ADV7171 the analog signal is output to the monitor. This is the middle, you can do all kinds of Y image processing, such as filtering, equalization, only need to be added after the converter processing files.)
文件列表:
blank (0, 2013-07-20)
blank\Design.asm.rpt (6538, 2013-05-14)
blank\Design.cdf (310, 2013-04-26)
blank\Design.done (26, 2013-05-14)
blank\Design.dpf (239, 2013-05-14)
blank\Design.eda.rpt (7190, 2013-05-14)
blank\Design.fit.rpt (220271, 2013-05-14)
blank\Design.fit.smsg (513, 2013-05-14)
blank\Design.fit.summary (606, 2013-05-14)
blank\Design.flow.rpt (8774, 2013-05-14)
blank\Design.map.rpt (33776, 2013-05-14)
blank\Design.map.summary (463, 2013-05-14)
blank\Design.pin (59070, 2013-05-14)
blank\Design.qpf (1262, 2013-03-24)
blank\Design.qsf (4581, 2013-07-20)
blank\Design.qws (535, 2013-07-20)
blank\Design.sof (1839589, 2013-05-14)
blank\Design.sta.rpt (119429, 2013-05-14)
blank\Design.sta.summary (682, 2013-05-14)
blank\Design.vhd (4853, 2013-05-14)
blank\Design.vhd.bak (4855, 2013-05-14)
blank\I2C_ADV7171.vhd (10755, 2013-04-10)
blank\I2C_ADV7171.vhd.bak (10734, 2013-04-09)
blank\I2C_TVP5150.vhd (4960, 2013-04-10)
blank\I2C_TVP5150.vhd.bak (4958, 2013-04-10)
blank\Re_毕设答疑.zip (4036, 2013-04-09)
blank\SAV_check.vhd (2411, 2013-05-10)
blank\SAV_check.vhd.bak (2407, 2013-05-10)
blank\converter.vhd (2061, 2013-05-14)
blank\converter.vhd.bak (2059, 2013-05-10)
blank\db (0, 2013-07-20)
blank\db\Design.(0).cnf.cdb (2466, 2013-05-14)
blank\db\Design.(0).cnf.hdb (1967, 2013-05-14)
blank\db\Design.(1).cnf.cdb (88829, 2013-05-10)
blank\db\Design.(1).cnf.hdb (4954, 2013-05-10)
blank\db\Design.(2).cnf.cdb (2748, 2013-05-10)
blank\db\Design.(2).cnf.hdb (1816, 2013-05-10)
blank\db\Design.(3).cnf.cdb (1028, 2013-05-10)
blank\db\Design.(3).cnf.hdb (819, 2013-05-10)
blank\db\Design.(4).cnf.cdb (4229, 2013-05-14)
... ...
Altera Complete Design Suite Release 9.0 README.TXT
=================================================================
This readme.txt file accompanies the Quartus II software version 9.0.
Although we have made every effort to ensure that this version
of the Altera(R) software functions correctly, there may be
problems that we haven't encountered. If you have a question or
problem that is not answered by the information provided in
this readme.txt file, please contact Altera support at
1-800-800-EPLD or submit a Service Request at mysupport.altera.com.
This readme.txt file contains the following information:
* Location of Additional Information -- tells you where to find
additional information about the Altera Complete Design Suite
* Package Contents -- describes the contents of the Altera Complete
Design Suite
* System Requirements -- describes the system requirements for the
components of the Altera Complete Design Suite
Location of Additional Information
==================================
You can find additional information about the Altera Complete
Design Suite at the following locations:
Release Notes -- for information about new features, known issues
and workarounds, timing model status, device support status,
revision history, and supported versions of other EDA tools, please
refer to the Quartus II Software Release Notes, the Nios II EDS
Release Notes, and the MegaCore IP Release Notes, available from the
Literature page of the Altera website.
Errata sheets that describe known issues with Altera MegaCore
functions and Nios II EDS are available from the Literature page
of the Altera website.
Installation & Licensing -- for information about installing and
licensing your Altera design software, please refer to the
Quartus II Installation & Licensing for Windows and Linux Workstations
manual, available from the Literature page of the Altera website.
Package contents
================
The Altera Complete Design Suite contains the following tools:
* Quartus II Design Software including SOPC Builder and MegaCore IP Library
* ModelSim-Altera VHDL and Verilog HDL Simulation Tool
* Nios II Embedded Design Suite
* DSP Builder
You can download software tools and documentation
from the Altera Download Center at the following URL:
www.altera.com/download
The Altera Complete Design Suite also contains the following
technical documentation:
Introduction to Quartus II manual
Quartus II Installation & Licensing for Windows and Linux
Workstations manual
Quartus II Handbook
Mentor Graphics ModelSim Support chapter
AN 340: Altera Software Licensing
AN 320: OpenCore Plus Evaluation of Megafunctions
AN 343: OpenCore Evaluation of AMPP Megafunctions
Nios II Processor Reference Handbook
Nios II Software Developer's Handbook
Nios II C2H Compiler User Guide
You can download the most current versions of these
documents from the Literature pages of the Altera website
at www.altera.com.
System Requirements
===================
Software requirements
---------------------
The Quartus II Design Software is supported on the
following operating systems and versions:
Windows XP SP2 32-bit
Windows XP SP2 ***-bit
Windows XP Pro X*** Edition
Windows Vista ***-bit
Windows Vista 32-bit
Red Hat Enterprise Linux 4.0 for 32-bit and for AMD***
or Intel EMT*** ***-bit CPUs
Red Hat Enterprise Linux 5.0 for 32-bit and for AMD***
or Intel EMT*** ***-bit CPUs
SUSE 9 Enterprise Linux
CentOS 4/5 for 32-bit and for AMD***
or Intel EMT*** ***-bit CPUs
The ModelSim-Altera VHDL and Verilog HDL Simulation Tool is supported on
the following operating systems and versions:
Windows XP SP2 32-bit
Windows Vista 32-bit
Red Hat Enterprise Linux 4.0 for 32-bit
Red Hat Enterprise Linux 5.0 for 32-bit
SUSE 9 Enterprise Linux 32-bit
The Nios II Embedded Design Suite is supported on the following
operating systems and versions:
Windows XP SP2
Windows XP Pro X*** Edition
Windows Vista 32-bit
Windows Vista ***-bit
Red Hat Linux Enterprise 4.0 for 32-bit and for AMD***
or Intel EMT*** ***-bit CPUs
Red Hat Enterprise Linux 5.0 for 32-bit and for AMD***
or Intel EMT*** ***-bit CPUs
SUSE 9 Enterprise Linux
The Altera MegaCore IP Library is supported on the following
operating systems and versions:
Windows XP SP2 32-bit
Windows XP SP2 ***-bit
Windows XP Pro X*** Edition
Windows Vista ***-bit
Windows Vista 32-bit
Red Hat Linux 4.0 for 32-bit and for AMD***
or Intel EMT*** ***-bit CPUs
Red Hat Linux 5.0 for 32-bit and for AMD***
or Intel EMT*** ***-bit CPUs
SUSE 9 Enterprise Linux
CentOS 4/5 for 32-bit and for AMD***
or Intel EMT*** ***-bit CPUs
Some MegaCore functions do not support all the listed operating
systems. Refer to the user guide for the individual MegaCore
function. Additional software, such as MATLAB, is required for
some MegaCore functions. Refer to the User Guide for the
individual MegaCore function.
DSP Builder is supported on the following operating systems and
versions:
All operating systems supported by the Quartus II software version 9.0.
The following additional software is required to run DSP Builder:
The MathWorks releases R2007b, R2008a, R2008b, or R2009a
(only the 32-bit versions are supported)
The DSP Builder Advanced blockset uses Simulink fixed-point
types for all operations and requires licensed versions of the
Simulink Fixed-Point Blockset and Fixed-Point Toolbox.
The Signal Processing Blockset is also recommended and is used
in many of the demonstration designs.
Quartus II software version 9.0
Browser
The Quartus II software uses a web browser to display the
interactive tutorial and certain other features. If your
operating system does not provide a default browser, you must
configure a web browser in the Internet Connectivity page of
the Options dialog box.
FLEXlm
The Altera Complete Design Suite uses the FLEXlm license server
software to support network (multiuser) licensing.
If it is not installed, the Quartus II installation process
installs it automatically. However, if you already have FLEXlm
license server software installed for an application other than
the Quartus II or MAX+PLUS(R) II software, you should verify
that the version is Flexlm 9.5 or later.
Display Manager
Linux
KDE version included in Red Hat distribution
Gnome version included in Red Hat distribution
Hardware requirements/recommendations
-------------------------------------
Pentium III or later for Windows or Linux
Color display capable of 1024 X 768 pixel resolution
DVD-ROM drive
One or more of the following I/O ports:
- USB port (if using Windows XP or Windows 2000) for
USB-Blaster(TM) or MasterBlaster(TM)
communications cables, or APU programming unit
- Parallel port for ByteBlasterMV(TM) or
ByteBlaster(TM) II download cables
- Serial port for MasterBlaster communications cable
Memory requirements/recommendations
-----------------------------------
Please see the Quartus II Device Support Release Notes for
information on memory requirements and recommendations.
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