ref-ddr-sdram-vhdl
所属分类：单片机开发
开发工具：Others
文件大小：427KB
下载次数：89
上传日期：2006-12-11 14:23:50
上 传 者：
martinkevin
说明： 本程序是DDR SDRAM控制器的VHDL程序，由ALTERA 提供
(this procedure is DDR SDRAM controller VHDL procedures provided by Altera)
文件列表:
ref-ddr-sdram-vhdl\synthesis\synplicity\ddr_sdram.prj (1327, 2000-06-30)
ref-ddr-sdram-vhdl\synthesis\synplicity\rev_1\ddr_sdram.srm (515682, 2000-06-30)
ref-ddr-sdram-vhdl\synthesis\synplicity\rev_1\ddr_sdram.srr (74092, 2000-06-30)
ref-ddr-sdram-vhdl\synthesis\synplicity\rev_1\ddr_sdram.srs (28364, 2000-06-30)
ref-ddr-sdram-vhdl\synthesis\synplicity\rev_1\ddr_sdram.tcl (334, 2000-06-30)
ref-ddr-sdram-vhdl\synthesis\synplicity\rev_1\ddr_sdram.tlg (3295, 2000-06-30)
ref-ddr-sdram-vhdl\synthesis\synplicity\rev_1\ddr_sdram.vqm (603209, 2000-06-30)
ref-ddr-sdram-vhdl\synthesis\synplicity\rev_1\ddr_sdram.xrf (116544, 2000-06-30)
ref-ddr-sdram-vhdl\synthesis\synplicity\rev_1\ddr_sdram_cons.tcl (194, 2000-06-30)
ref-ddr-sdram-vhdl\synthesis\synplicity\rev_1\ddr_sdram_rm.tcl (328, 2000-06-30)
ref-ddr-sdram-vhdl\synthesis\synplicity\rev_1 (0, 2006-10-09)
ref-ddr-sdram-vhdl\synthesis\synplicity (0, 2006-10-09)
ref-ddr-sdram-vhdl\synthesis (0, 2006-10-09)
ref-ddr-sdram-vhdl\source\ddr_command.vhd (17418, 2000-08-14)
ref-ddr-sdram-vhdl\source\ddr_control_interface.vhd (9161, 2000-08-14)
ref-ddr-sdram-vhdl\source\ddr_data_path.vhd (9286, 2000-08-14)
ref-ddr-sdram-vhdl\source\ddr_sdram.vhd (18307, 2000-08-14)
ref-ddr-sdram-vhdl\source (0, 2006-10-09)
ref-ddr-sdram-vhdl\simulation\APEX20KE_MF.VHD (42715, 2000-06-29)
ref-ddr-sdram-vhdl\simulation\ddr_command.vhd (17418, 2000-08-14)
ref-ddr-sdram-vhdl\simulation\ddr_control_interface.vhd (9161, 2000-08-14)
ref-ddr-sdram-vhdl\simulation\ddr_data_path.vhd (9286, 2000-08-14)
ref-ddr-sdram-vhdl\simulation\ddr_sdram.vhd (18307, 2000-08-14)
ref-ddr-sdram-vhdl\simulation\ddr_sdram_tb.vhd (24245, 2000-08-14)
ref-ddr-sdram-vhdl\simulation\io_utils.vhd (8703, 1998-01-16)
ref-ddr-sdram-vhdl\simulation\lpm_pack.vhd (22051, 1999-10-22)
ref-ddr-sdram-vhdl\simulation\modelsim.ini (8116, 2000-08-14)
ref-ddr-sdram-vhdl\simulation\mt46v4m16.vhd (43490, 1999-11-08)
ref-ddr-sdram-vhdl\simulation\mti_pkg.vhd (4932, 2000-08-14)
ref-ddr-sdram-vhdl\simulation\pll1.vhd (5081, 2000-06-29)
ref-ddr-sdram-vhdl\simulation\stdlogar.vhd (68654, 1998-01-16)
ref-ddr-sdram-vhdl\simulation\util1164.vhd (3310, 1998-01-16)
ref-ddr-sdram-vhdl\simulation\wave.do (5967, 2000-08-14)
ref-ddr-sdram-vhdl\simulation\work\_info (7480, 2000-08-14)
ref-ddr-sdram-vhdl\simulation\work\util_1164\body.dat (2123, 2000-08-14)
ref-ddr-sdram-vhdl\simulation\work\util_1164\body.psm (10744, 2000-08-14)
ref-ddr-sdram-vhdl\simulation\work\util_1164\_primary.dat (418, 2000-08-14)
ref-ddr-sdram-vhdl\simulation\work\util_1164\_vhdl.psm (128, 2000-08-14)
... ...
File/Directory Description
=============================================================================
\doc DDR SDRAM reference design documentation
\model Contains the vhdl SDRAM model
\route Contains the Quartus 2000.05 project files a routed controller design
\simulation Contains the vhdl testbench, modelsim project file, and library
\source Contains the vhdl source files for the DDR SDRAM reference design
\synthesis\synplicity Contains all synplicity project files associated with synthesizing the reference design
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