ADC_DualModeInterleaved
所属分类:单片机开发
开发工具:C/C++
文件大小:20KB
下载次数:105
上传日期:2013-10-14 19:06:26
上 传 者:
stefan2005
说明: stm32f4 adc 的代码,双通道,用DMA保存数据。
(stm32f4 family c code, adc
This example provides a short description of how to use the ADC peripheral to
convert a regular channel in Dual interleaved mode using DMA in mode 3 with 5Msps.
DMA mode 3 is used in interleaved mode in 6-bit and 8-bit resolutions.
The Dual interleaved delay is configured 6 ADC clk cycles.
On each DMA request (two data items are available) two bytes representing two
ADC-converted data items are transferred as a half word.
The data transfer order is similar to that of the DMA mode 2.
A DMA request is generated each time 2 data items are available
1st request: ADC_CDR[15:0] = (ADC2_DR[7:0] << 8) | ADC1_DR[7:0]
2nd request: ADC_CDR[15:0] = (ADC2_DR[7:0] << 8) | ADC1_DR[7:0]
The ADC1 and ADC2 are configured to convert ADC Channel 12, with conversion
triggered by software.
By this way, ADC channel 12 is converted each 6 cycles.
In this example, the system clock is 168MHz, APB2 =84MHz and ADC clock = APB2 /2.
Since ADCCLK=)
文件列表:
ADC_DualModeInterleaved\main.c (9745, 2013-01-18)
ADC_DualModeInterleaved\main.h (3739, 2013-01-18)
ADC_DualModeInterleaved\simulation.xls (34304, 2012-12-26)
ADC_DualModeInterleaved\stm32f4xx_conf.h (3763, 2013-01-18)
ADC_DualModeInterleaved\stm32f4xx_it.c (4469, 2013-01-18)
ADC_DualModeInterleaved\stm32f4xx_it.h (2208, 2013-01-18)
ADC_DualModeInterleaved\system_stm32f4xx.c (22024, 2013-01-18)
ADC_DualModeInterleaved (0, 2013-09-04)
/**
@page ADC_DualModeInterleaved Use ADC1 and ADC2 in Dual interleaved mode and DMA mode3
@verbatim
******************** (C) COPYRIGHT 2013 STMicroelectronics *******************
* @file ADC/ADC_DualModeInterleaved/readme.txt
* @author MCD Application Team
* @version V1.1.0
* @date 18-January-2013
* @brief Description of the Dual interleaved mode and DMA mode3 Example
******************************************************************************
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************
@endverbatim
@par Example Description
This example provides a short description of how to use the ADC peripheral to
convert a regular channel in Dual interleaved mode using DMA in mode 3 with 5Msps.
DMA mode 3 is used in interleaved mode in 6-bit and 8-bit resolutions.
The Dual interleaved delay is configured 6 ADC clk cycles.
On each DMA request (two data items are available) two bytes representing two
ADC-converted data items are transferred as a half word.
The data transfer order is similar to that of the DMA mode 2.
A DMA request is generated each time 2 data items are available
1st request: ADC_CDR[15:0] = (ADC2_DR[7:0] << 8) | ADC1_DR[7:0]
2nd request: ADC_CDR[15:0] = (ADC2_DR[7:0] << 8) | ADC1_DR[7:0]
The ADC1 and ADC2 are configured to convert ADC Channel 12, with conversion
triggered by software.
By this way, ADC channel 12 is converted each 6 cycles.
In this example, the system clock is 168MHz, APB2 =84MHz and ADC clock = APB2 /2.
Since ADCCLK= 42MHz and Conversion rate = 6 cycle
==> Conversion Time = 42M/6cyc = 7Msps.
@note Refer to "simulation.xls" file to have the diagram simulation of the example.
@par Directory contents
- ADC/ADC_DualModeInterleaved/system_stm32f4xx.c STM32F4xx system clock configuration file
- ADC/ADC_DualModeInterleaved/stm32f4xx_conf.h Library Configuration file
- ADC/ADC_DualModeInterleaved/stm32f4xx_it.h Interrupt handlers header file
- ADC/ADC_DualModeInterleaved/stm32f4xx_it.c Interrupt handlers
- ADC/ADC_DualModeInterleaved/main.c Main program
- ADC/ADC_DualModeInterleaved/main.h Main program header file
@note The "system_stm32f4xx.c" is generated by an automatic clock configuration
tool and can be easily customized to your own configuration.
To select different clock setup, use the "STM32F4xx_Clock_Configuration_V1.1.0.xls"
provided with the AN3***8 package available on
ST Microcontrollers
@par Hardware and Software environment
- This example runs on STM32F40xx/STM32F41xx, STM32F427x/STM32F437x Devices.
- This example has been tested with STMicroelectronics STM324xG-EVAL (STM32F40xx/
STM32F41xx Devices) and STM32437I-EVAL (STM32F427x/STM32F437x Devices) evaluation
boards and can be easily tailored to any other supported device and development
board.
- STM324xG-EVAL and STM32437I-EVAL Set-up
- Connect PC.2 to a power supply (do not forget to connect the power supply
GND to the EVAL board GND)
@par How to use it ?
In order to make the program work, you must do the following :
- Copy all source files from this example folder to the template folder under
Project\STM32F4xx_StdPeriph_Templates
- Open your preferred toolchain
- Rebuild all files and load your image into target memory
- Run the example
*
© COPYRIGHT STMicroelectronics
*/
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