8811462I2C_verilog
所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：511KB
下载次数：9
上传日期：2013-10-16 16:14:06
上 传 者：
elvira_0519
说明： I2C总线控制I2C总线控制I2C总线控制I2C总线控制I2C总线控制I2C总线控制
(I2C bus control)
文件列表:
I2C总线VHDL-Verilog+HDL源码\i2c\bench\CVS\Entries (14, 2005-08-11)
I2C总线VHDL-Verilog+HDL源码\i2c\bench\CVS\Repository (10, 2005-08-11)
I2C总线VHDL-Verilog+HDL源码\i2c\bench\CVS\Root (14, 2005-08-11)
I2C总线VHDL-Verilog+HDL源码\i2c\bench\verilog\CVS\Entries (200, 2005-08-11)
I2C总线VHDL-Verilog+HDL源码\i2c\bench\verilog\CVS\Repository (18, 2005-08-11)
I2C总线VHDL-Verilog+HDL源码\i2c\bench\verilog\CVS\Root (14, 2005-08-11)
I2C总线VHDL-Verilog+HDL源码\i2c\bench\verilog\i2c_slave_model.v (11418, 2005-02-28)
I2C总线VHDL-Verilog+HDL源码\i2c\bench\verilog\spi_slave_model.v (3934, 2004-02-28)
I2C总线VHDL-Verilog+HDL源码\i2c\bench\verilog\tst_bench_top.v (14428, 2005-02-27)
I2C总线VHDL-Verilog+HDL源码\i2c\bench\verilog\wb_master_model.v (5566, 2004-02-28)
I2C总线VHDL-Verilog+HDL源码\i2c\CVS\Entries (102, 2005-08-11)
I2C总线VHDL-Verilog+HDL源码\i2c\CVS\Repository (4, 2005-08-11)
I2C总线VHDL-Verilog+HDL源码\i2c\CVS\Root (14, 2005-08-11)
I2C总线VHDL-Verilog+HDL源码\i2c\doc\CVS\Entries (59, 2005-08-11)
I2C总线VHDL-Verilog+HDL源码\i2c\doc\CVS\Repository (8, 2005-08-11)
I2C总线VHDL-Verilog+HDL源码\i2c\doc\CVS\Root (14, 2005-08-11)
I2C总线VHDL-Verilog+HDL源码\i2c\doc\i2c_specs.pdf (211471, 2003-07-03)
I2C总线VHDL-Verilog+HDL源码\i2c\doc\src\CVS\Entries (51, 2005-08-11)
I2C总线VHDL-Verilog+HDL源码\i2c\doc\src\CVS\Repository (12, 2005-08-11)
I2C总线VHDL-Verilog+HDL源码\i2c\doc\src\CVS\Root (14, 2005-08-11)
I2C总线VHDL-Verilog+HDL源码\i2c\doc\src\I2C_specs.doc (464896, 2003-07-03)
I2C总线VHDL-Verilog+HDL源码\i2c\documentation\CVS\Entries (2, 2005-08-11)
I2C总线VHDL-Verilog+HDL源码\i2c\documentation\CVS\Repository (18, 2005-08-11)
I2C总线VHDL-Verilog+HDL源码\i2c\documentation\CVS\Root (14, 2005-08-11)
I2C总线VHDL-Verilog+HDL源码\i2c\rtl\CVS\Entries (25, 2005-08-11)
I2C总线VHDL-Verilog+HDL源码\i2c\rtl\CVS\Repository (8, 2005-08-11)
I2C总线VHDL-Verilog+HDL源码\i2c\rtl\CVS\Root (14, 2005-08-11)
I2C总线VHDL-Verilog+HDL源码\i2c\rtl\verilog\CVS\Entries (259, 2005-08-11)
I2C总线VHDL-Verilog+HDL源码\i2c\rtl\verilog\CVS\Repository (16, 2005-08-11)
I2C总线VHDL-Verilog+HDL源码\i2c\rtl\verilog\CVS\Root (14, 2005-08-11)
I2C总线VHDL-Verilog+HDL源码\i2c\rtl\verilog\i2c_master_bit_ctrl.v (17310, 2004-05-07)
I2C总线VHDL-Verilog+HDL源码\i2c\rtl\verilog\i2c_master_byte_ctrl.v (10547, 2004-02-18)
I2C总线VHDL-Verilog+HDL源码\i2c\rtl\verilog\i2c_master_defines.v (3219, 2001-11-05)
I2C总线VHDL-Verilog+HDL源码\i2c\rtl\verilog\i2c_master_top.v (10108, 2005-02-27)
I2C总线VHDL-Verilog+HDL源码\i2c\rtl\verilog\timescale.v (23, 2001-09-24)
I2C总线VHDL-Verilog+HDL源码\i2c\rtl\vhdl\CVS\Entries (293, 2005-08-11)
I2C总线VHDL-Verilog+HDL源码\i2c\rtl\vhdl\CVS\Repository (13, 2005-08-11)
I2C总线VHDL-Verilog+HDL源码\i2c\rtl\vhdl\CVS\Root (14, 2005-08-11)
I2C总线VHDL-Verilog+HDL源码\i2c\rtl\vhdl\I2C.VHD (13542, 2001-09-24)
I2C总线VHDL-Verilog+HDL源码\i2c\rtl\vhdl\i2c_master_bit_ctrl.vhd (18162, 2004-05-07)
... ...
-- This code is provided for free and may be used and --
-- distributed without restriction provided that the --
-- copyright statement is not removed from the file and --
-- that any derivative work contains the original --
-- copyright notice and the associated disclaimer. --
-- Comments and suggestions are always welcome --
The i2c_master core consists of three files:
- i2c_master_top -- top level
- i2c_master_byte_ctrl -- byte controller
- i2c_master_bit_ctrl -- bit controller
VHDL needs to be compiled in order. The files are listed
above in descending order.
I2C.VHD and tst_ds1621.vhd are not supported anymore.
They remain mostly for historical purposes, altough they
might prove usefull.
Richard Herveille
rherveille@opencores.org
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