sata_controller_core_latest.tar
所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：394KB
下载次数：31
上传日期：2013-11-04 09:23:52
上 传 者：
jiangyl2013
说明： sata controller core
文件列表:
sata_controller_core (0, 2013-05-07)
sata_controller_core\tags (0, 2013-05-07)
sata_controller_core\branches (0, 2013-05-07)
sata_controller_core\trunk (0, 2013-05-07)
sata_controller_core\trunk\sata2_fifo_v1_00_a (0, 2013-05-07)
sata_controller_core\trunk\sata2_fifo_v1_00_a\COPYING3 (35147, 2012-04-25)
sata_controller_core\trunk\sata2_fifo_v1_00_a\netlist (0, 2013-05-07)
sata_controller_core\trunk\sata2_fifo_v1_00_a\netlist\rx_tx_fifo.xco (2497, 2012-04-12)
sata_controller_core\trunk\sata2_fifo_v1_00_a\netlist\read_write_fifo.xco (2503, 2012-04-12)
sata_controller_core\trunk\sata2_fifo_v1_00_a\netlist\.lso (20, 2012-04-12)
sata_controller_core\trunk\sata2_fifo_v1_00_a\netlist\user_fifo.xco (2506, 2012-06-28)
sata_controller_core\trunk\sata2_fifo_v1_00_a\netlist\Makefile (515, 2012-04-12)
sata_controller_core\trunk\sata2_fifo_v1_00_a\netlist\coregen.cgp (467, 2012-04-12)
sata_controller_core\trunk\sata2_fifo_v1_00_a\doc (0, 2013-05-07)
sata_controller_core\trunk\sata2_fifo_v1_00_a\etc (0, 2013-05-07)
sata_controller_core\trunk\sata2_fifo_v1_00_a\etc\bitgen.ut (221, 2012-04-12)
sata_controller_core\trunk\sata2_fifo_v1_00_a\syn (0, 2013-05-07)
sata_controller_core\trunk\sata2_fifo_v1_00_a\syn\sata_core.scr (200, 2012-04-12)
sata_controller_core\trunk\sata2_fifo_v1_00_a\syn\sata_core.prj (537, 2012-04-12)
sata_controller_core\trunk\sata2_fifo_v1_00_a\syn\.lso (5, 2012-04-12)
sata_controller_core\trunk\sata2_fifo_v1_00_a\syn\Makefile (1345, 2012-04-12)
sata_controller_core\trunk\sata2_fifo_v1_00_a\ucf (0, 2013-05-07)
sata_controller_core\trunk\sata2_fifo_v1_00_a\ucf\sata_core.ucf (1242, 2012-04-12)
sata_controller_core\trunk\sata2_fifo_v1_00_a\hdl (0, 2013-05-07)
sata_controller_core\trunk\sata2_fifo_v1_00_a\hdl\verilog (0, 2013-05-07)
sata_controller_core\trunk\sata2_fifo_v1_00_a\hdl\verilog\sata_gtx_dual.v (20433, 2012-04-12)
sata_controller_core\trunk\sata2_fifo_v1_00_a\hdl\verilog\sata_phy.v (27923, 2012-04-19)
sata_controller_core\trunk\sata2_fifo_v1_00_a\hdl\verilog\mux_21.v (1263, 2012-04-12)
sata_controller_core\trunk\sata2_fifo_v1_00_a\hdl\verilog\mux_41.v (1403, 2012-04-12)
sata_controller_core\trunk\sata2_fifo_v1_00_a\hdl\verilog\mgt_usrclk_source_mmcm.v (6509, 2012-04-12)
sata_controller_core\trunk\sata2_fifo_v1_00_a\hdl\verilog\oob_control.v (13884, 2012-04-19)
sata_controller_core\trunk\sata2_fifo_v1_00_a\hdl\verilog\sata_gtx.v (33155, 2012-04-19)
sata_controller_core\trunk\sata2_fifo_v1_00_a\hdl\vhdl (0, 2013-05-07)
sata_controller_core\trunk\sata2_fifo_v1_00_a\hdl\vhdl\scrambler.vhd (10407, 2012-04-12)
sata_controller_core\trunk\sata2_fifo_v1_00_a\hdl\vhdl\crc.vhd (12558, 2012-04-12)
sata_controller_core\trunk\sata2_fifo_v1_00_a\hdl\vhdl\mux_161.vhd (3090, 2012-04-12)
sata_controller_core\trunk\sata2_fifo_v1_00_a\hdl\vhdl\command_layer.vhd (20751, 2012-04-12)
sata_controller_core\trunk\sata2_fifo_v1_00_a\hdl\vhdl\sata_core.vhd (11915, 2012-06-28)
sata_controller_core\trunk\sata2_fifo_v1_00_a\hdl\vhdl\sata_link_layer.vhd (63219, 2012-07-10)
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