SDRAM
所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：7KB
下载次数：1
上传日期：2013-11-28 15:19:18
上 传 者：
4556677
说明： SDRAM controller: it contains a SDRAM controller writtern in verilog language.
It is a interface between microprocessor and SDRAM device.
文件列表:
SDRAM\5SDRAM\sdramc_controller\sdr_defines.v (5103, 2008-06-03)
SDRAM\5SDRAM\sdramc_controller\sdr_sdramc_top.v (2064, 2008-06-03)
SDRAM\5SDRAM\sdramc_controller\sdr_sig.v (5377, 2008-06-03)
SDRAM\5SDRAM\sdramc_controller\sdr_wb_if.v (8714, 2008-06-03)
SDRAM\5SDRAM\sdramc_controller\timescale.v (3498, 2008-06-03)
SDRAM\5SDRAM\sdramc_controller (0, 2012-05-06)
SDRAM\5SDRAM (0, 2013-11-28)
SDRAM (0, 2013-11-28)
SB slave: It is contain a USB slave design written in verilog language.SDRAM controller: it contains a SDRAM controller writtern in verilog language. It is a interface between microprocessor and SDRAM device.
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