verific_evaluation
所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：10151KB
下载次数：14
上传日期：2013-12-11 11:13:32
上 传 者：
lihe518522
说明： 这是一个比较大的数字逻辑电路的verilog代码，具有版权保护，可以实现多输入乘法器。
(This is a relatively large verilog code digital logic circuits, with copyright protection, you can achieve multiple-input multiplier.)
文件列表:
verific_bin_eval (0, 2013-08-31)
verific_bin_eval\TclCommands.pdf (100657, 2013-08-31)
verific_bin_eval\vhdl_packages (0, 2013-08-31)
verific_bin_eval\vhdl_packages\vdbs (0, 2013-08-31)
verific_bin_eval\vhdl_packages\vdbs\synopsys (0, 2013-08-31)
verific_bin_eval\vhdl_packages\vdbs\synopsys\attributes.vdb (3628, 2013-08-31)
verific_bin_eval\vhdl_packages\vdbs\arithmetic (0, 2013-08-31)
verific_bin_eval\vhdl_packages\vdbs\arithmetic\std_logic_arith.vdb (348552, 2013-08-31)
verific_bin_eval\vhdl_packages\vdbs\bin (13, 2013-08-31)
verific_bin_eval\vhdl_packages\vdbs\ieee (0, 2013-08-31)
verific_bin_eval\vhdl_packages\vdbs\ieee\std_logic_misc.vdb (15145, 2013-08-31)
verific_bin_eval\vhdl_packages\vdbs\ieee\numeric_bit.vdb (189100, 2013-08-31)
verific_bin_eval\vhdl_packages\vdbs\ieee\std_logic_unsigned.vdb (29052, 2013-08-31)
verific_bin_eval\vhdl_packages\vdbs\ieee\std_logic_textio.vdb (61823, 2013-08-31)
verific_bin_eval\vhdl_packages\vdbs\ieee\std_logic_1164.vdb (89082, 2013-08-31)
verific_bin_eval\vhdl_packages\vdbs\ieee\std_logic_arith.vdb (174955, 2013-08-31)
verific_bin_eval\vhdl_packages\vdbs\ieee\numeric_std.vdb (258711, 2013-08-31)
verific_bin_eval\vhdl_packages\vdbs\ieee\std_logic_signed.vdb (32101, 2013-08-31)
verific_bin_eval\vhdl_packages\vdbs\ieee\vital_primitives.vdb (289337, 2013-08-31)
verific_bin_eval\vhdl_packages\vdbs\ieee\vital_timing.vdb (103202, 2013-08-31)
verific_bin_eval\vhdl_packages\vdbs\vl (0, 2013-08-31)
verific_bin_eval\vhdl_packages\vdbs\vl\vl_types.vdb (24876, 2013-08-31)
verific_bin_eval\vhdl_packages\vdbs\qsim_logic (0, 2013-08-31)
verific_bin_eval\vhdl_packages\vdbs\qsim_logic\qsim_logic.vdb (334407, 2013-08-31)
verific_bin_eval\vhdl_packages\vdbs\std (0, 2013-08-31)
verific_bin_eval\vhdl_packages\vdbs\std\standard.vdb (27077, 2013-08-31)
verific_bin_eval\vhdl_packages\vdbs\std\textio.vdb (26635, 2013-08-31)
verific_bin_eval\vhdl_packages\ieee_2008 (0, 2013-08-31)
verific_bin_eval\vhdl_packages\ieee_2008\bin (0, 2013-08-31)
verific_bin_eval\vhdl_packages\ieee_2008\bin\synopsys (0, 2013-08-31)
verific_bin_eval\vhdl_packages\ieee_2008\bin\synopsys\attributes.vdb (3628, 2013-08-31)
verific_bin_eval\vhdl_packages\ieee_2008\bin\arithmetic (0, 2013-08-31)
verific_bin_eval\vhdl_packages\ieee_2008\bin\arithmetic\std_logic_arith.vdb (296299, 2013-08-31)
verific_bin_eval\vhdl_packages\ieee_2008\bin\bin (13, 2013-08-31)
verific_bin_eval\vhdl_packages\ieee_2008\bin\ieee (0, 2013-08-31)
verific_bin_eval\vhdl_packages\ieee_2008\bin\ieee\std_logic_misc.vdb (9276, 2013-08-31)
verific_bin_eval\vhdl_packages\ieee_2008\bin\ieee\numeric_bit.vdb (276783, 2013-08-31)
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