digital_clock
所属分类：VHDL/FPGA/Verilog
开发工具：Others
文件大小：1561KB
下载次数：2
上传日期：2014-03-28 19:39:17
上 传 者：
dragon li
说明： 数字钟的设计，系统分为5个模块，Freq_div模块，Clock_cnt模块，Clock_ctl模块，Key_ctl模块和Display模块。系统目标：用8个LED 显示时间，如9点25分10秒显示为，09－25－10。（2）设置2个按键，按键SET用于工作模式选择，按键UP用于校时。
(Digital clock design, the system is divided into five modules, Freq_div module, Clock_cnt module, Clock_ctl module, Key_ctl module and Display Module. System goal: 8 LED display time as 9:25:10 displayed as ,09-25-10. (2) Set two buttons SET button for mode selection button when UP for school.)
文件列表:
digital_clock\Clock_cnt.v (4626, 2013-12-08)
digital_clock\Clock_cnt.v.bak (4626, 2013-12-08)
digital_clock\Clock_ctl.v (2574, 2013-12-04)
digital_clock\Clock_ctl.v.bak (2570, 2013-12-04)
digital_clock\db\add_sub_4rh.tdf (2432, 2013-12-06)
digital_clock\db\add_sub_7rh.tdf (2903, 2013-12-06)
digital_clock\db\add_sub_nsh.tdf (4405, 2013-12-06)
digital_clock\db\digital_clock.(0).cnf.cdb (2044, 2013-12-08)
digital_clock\db\digital_clock.(0).cnf.hdb (1355, 2013-12-08)
digital_clock\db\digital_clock.(1).cnf.cdb (3065, 2013-12-05)
digital_clock\db\digital_clock.(1).cnf.hdb (1157, 2013-12-05)
digital_clock\db\digital_clock.(2).cnf.cdb (3607, 2013-12-08)
digital_clock\db\digital_clock.(2).cnf.hdb (1042, 2013-12-08)
digital_clock\db\digital_clock.(3).cnf.cdb (11610, 2013-12-08)
digital_clock\db\digital_clock.(3).cnf.hdb (1236, 2013-12-08)
digital_clock\db\digital_clock.(4).cnf.cdb (1822, 2013-12-04)
digital_clock\db\digital_clock.(4).cnf.hdb (802, 2013-12-04)
digital_clock\db\digital_clock.(5).cnf.cdb (1576, 2013-12-07)
digital_clock\db\digital_clock.(5).cnf.hdb (1251, 2013-12-07)
digital_clock\db\digital_clock.ace_cmp.bpm (649, 2014-01-21)
digital_clock\db\digital_clock.ace_cmp.cdb (45295, 2014-01-21)
digital_clock\db\digital_clock.ace_cmp.ecobp (28, 2014-01-21)
digital_clock\db\digital_clock.ace_cmp.hdb (14062, 2014-01-21)
digital_clock\db\digital_clock.ae.hdb (13071, 2014-01-21)
digital_clock\db\digital_clock.asm.qmsg (2027, 2014-02-01)
digital_clock\db\digital_clock.asm.rdb (1395, 2014-02-01)
digital_clock\db\digital_clock.atom.rvd (43631, 2014-01-21)
digital_clock\db\digital_clock.atom_map.rvd (43628, 2014-01-21)
digital_clock\db\digital_clock.cbx.xml (95, 2014-02-01)
digital_clock\db\digital_clock.cmp.bpm (649, 2014-02-01)
digital_clock\db\digital_clock.cmp.cdb (45295, 2014-02-01)
digital_clock\db\digital_clock.cmp.ecobp (28, 2014-02-01)
digital_clock\db\digital_clock.cmp.hdb (14616, 2014-02-01)
digital_clock\db\digital_clock.cmp.kpt (427, 2014-02-01)
digital_clock\db\digital_clock.cmp.logdb (4, 2014-02-01)
digital_clock\db\digital_clock.cmp.rdb (26393, 2014-02-01)
digital_clock\db\digital_clock.cmp.tdb (40129, 2014-02-01)
digital_clock\db\digital_clock.cmp0.ddb (47337, 2014-02-01)
digital_clock\db\digital_clock.cmp_merge.kpt (205, 2014-02-01)
digital_clock\db\digital_clock.db_info (137, 2013-12-01)
... ...
This folder contains data for incremental compilation.
The compiled_partitions sub-folder contains previous compilation results for each partition.
As long as this folder is preserved, incremental compilation results from earlier compiles
can be re-used. To perform a clean compilation from source files for all partitions, both
the db and incremental_db folder should be removed.
The imported_partitions sub-folder contains the last imported QXP for each imported partition.
As long as this folder is preserved, imported partitions will be automatically re-imported
when the db or incremental_db/compiled_partitions folders are removed.
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