ethernet_tri_mode
所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：6230KB
下载次数：53
上传日期：2014-04-08 20:30:44
上 传 者：
ldf985
说明： 三速以太网，仿真测试验证通过,VHDL编写，包含有说明文档和寄存器文档。
(trimode ethernet)
文件列表:
ethernet_tri_mode\.svn\all-wcprops (95, 2009-07-27)
ethernet_tri_mode\.svn\entries (306, 2009-07-27)
ethernet_tri_mode\.svn\format (2, 2009-07-27)
ethernet_tri_mode\branches\.svn\all-wcprops (104, 2009-07-27)
ethernet_tri_mode\branches\.svn\dir-prop-base (28, 2009-07-27)
ethernet_tri_mode\branches\.svn\entries (268, 2009-07-27)
ethernet_tri_mode\branches\.svn\format (2, 2009-07-27)
ethernet_tri_mode\tags\.svn\all-wcprops (100, 2009-07-27)
ethernet_tri_mode\tags\.svn\dir-prop-base (28, 2009-07-27)
ethernet_tri_mode\tags\.svn\entries (311, 2009-07-27)
ethernet_tri_mode\tags\.svn\format (2, 2009-07-27)
ethernet_tri_mode\tags\arelease\.svn\all-wcprops (109, 2009-07-27)
ethernet_tri_mode\tags\arelease\.svn\entries (269, 2009-07-27)
ethernet_tri_mode\tags\arelease\.svn\format (2, 2009-07-27)
ethernet_tri_mode\tags\arelease\doc\.svn\all-wcprops (266, 2009-07-27)
ethernet_tri_mode\tags\arelease\doc\.svn\entries (444, 2009-07-27)
ethernet_tri_mode\tags\arelease\doc\.svn\format (2, 2009-07-27)
ethernet_tri_mode\tags\arelease\doc\.svn\prop-base\RGMII_DataSheet.pdf.svn-base (53, 2009-07-27)
ethernet_tri_mode\tags\arelease\doc\.svn\text-base\RGMII_DataSheet.pdf.svn-base (41444, 2009-07-27)
ethernet_tri_mode\tags\arelease\doc\RGMII_DataSheet.pdf (41444, 2009-07-27)
ethernet_tri_mode\tags\rel-1-0\.svn\all-wcprops (236, 2009-07-27)
ethernet_tri_mode\tags\rel-1-0\.svn\entries (462, 2009-07-27)
ethernet_tri_mode\tags\rel-1-0\.svn\format (2, 2009-07-27)
ethernet_tri_mode\tags\rel-1-0\.svn\text-base\start.tcl.svn-base (5607, 2009-07-27)
ethernet_tri_mode\tags\rel-1-0\bench\.svn\all-wcprops (114, 2009-07-27)
ethernet_tri_mode\tags\rel-1-0\bench\.svn\entries (289, 2009-07-27)
ethernet_tri_mode\tags\rel-1-0\bench\.svn\format (2, 2009-07-27)
ethernet_tri_mode\tags\rel-1-0\bench\verilog\.svn\all-wcprops (996, 2009-07-27)
ethernet_tri_mode\tags\rel-1-0\bench\verilog\.svn\entries (1197, 2009-07-27)
ethernet_tri_mode\tags\rel-1-0\bench\verilog\.svn\format (2, 2009-07-27)
ethernet_tri_mode\tags\rel-1-0\bench\verilog\.svn\text-base\altera_mf.v.svn-base (1337985, 2009-07-27)
ethernet_tri_mode\tags\rel-1-0\bench\verilog\.svn\text-base\host_sim.v.svn-base (1706, 2009-07-27)
ethernet_tri_mode\tags\rel-1-0\bench\verilog\.svn\text-base\Phy_sim.v.svn-base (4328, 2009-07-27)
ethernet_tri_mode\tags\rel-1-0\bench\verilog\.svn\text-base\reg_int_sim.v.svn-base (6326, 2009-07-27)
ethernet_tri_mode\tags\rel-1-0\bench\verilog\.svn\text-base\tb_top.v.svn-base (9317, 2009-07-27)
ethernet_tri_mode\tags\rel-1-0\bench\verilog\.svn\text-base\User_int_sim.v.svn-base (4971, 2009-07-27)
ethernet_tri_mode\tags\rel-1-0\bench\verilog\altera_mf.v (1337985, 2009-07-27)
ethernet_tri_mode\tags\rel-1-0\bench\verilog\host_sim.v (1706, 2009-07-27)
ethernet_tri_mode\tags\rel-1-0\bench\verilog\Phy_sim.v (4328, 2009-07-27)
ethernet_tri_mode\tags\rel-1-0\bench\verilog\reg_int_sim.v (6326, 2009-07-27)
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