rader_transfom
所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：1606KB
下载次数：3
上传日期：2014-04-18 01:34:37
上 传 者：
gogoyaya
说明： implementation of fft Rader algorithm in vhdl
文件列表:
rader_transfom\B_bit_int_vhdl.prj (70, 2012-07-09)
rader_transfom\dadergenerat.jhd (21, 2012-07-19)
rader_transfom\dadergenerat.sch (343, 2012-07-19)
rader_transfom\fuse.log (1213, 2012-07-11)
rader_transfom\gogo.udo (390, 2012-07-09)
rader_transfom\gogo.vhd (2412, 2012-07-09)
rader_transfom\gogo_wave.fdo (415, 2012-07-09)
rader_transfom\ipcore_dir (0, 2012-07-09)
rader_transfom\iseconfig\rader7.xreport (20855, 2012-11-24)
rader_transfom\iseconfig\rader_transfom.projectmgr (10077, 2012-11-24)
rader_transfom\iseconfig (0, 2013-03-15)
rader_transfom\isim\isim_usage_statistics.html (1673, 2012-08-03)
rader_transfom\isim\Nouveau dossier\fff\fff.gise (5594, 2012-08-03)
rader_transfom\isim\Nouveau dossier\fff\fff.xise (35846, 2012-08-03)
rader_transfom\isim\Nouveau dossier\fff\ffff.cmd_log (188, 2012-07-19)
rader_transfom\isim\Nouveau dossier\fff\ffff.jhd (54, 2012-07-19)
rader_transfom\isim\Nouveau dossier\fff\ffff.lso (6, 2012-07-19)
rader_transfom\isim\Nouveau dossier\fff\ffff.prj (22, 2012-07-19)
rader_transfom\isim\Nouveau dossier\fff\ffff.sch (2505, 2012-07-19)
rader_transfom\isim\Nouveau dossier\fff\ffff.syr (4395, 2012-07-19)
rader_transfom\isim\Nouveau dossier\fff\ffff.vhf (1159, 2012-07-19)
rader_transfom\isim\Nouveau dossier\fff\ffff.xst (1210, 2012-07-19)
rader_transfom\isim\Nouveau dossier\fff\ffff_envsettings.html (9494, 2012-08-03)
rader_transfom\isim\Nouveau dossier\fff\ffff_summary.html (4443, 2012-08-03)
rader_transfom\isim\Nouveau dossier\fff\ffff_vhdl.prj (90, 2012-07-19)
rader_transfom\isim\Nouveau dossier\fff\ffff_xst.xrpt (8886, 2012-07-19)
rader_transfom\isim\Nouveau dossier\fff\gene_din.vhd (3379, 2012-07-16)
rader_transfom\isim\Nouveau dossier\fff\ipcore_dir\coregen.cgp (518, 2012-07-19)
rader_transfom\isim\Nouveau dossier\fff\ipcore_dir\xfft_v7_1.asy (1660, 2012-07-19)
rader_transfom\isim\Nouveau dossier\fff\ipcore_dir\xfft_v7_1.gise (1267, 2012-08-03)
rader_transfom\isim\Nouveau dossier\fff\ipcore_dir\xfft_v7_1.ngc (332086, 2012-07-19)
rader_transfom\isim\Nouveau dossier\fff\ipcore_dir\xfft_v7_1.vhd (476410, 2012-07-19)
rader_transfom\isim\Nouveau dossier\fff\ipcore_dir\xfft_v7_1.vho (5604, 2012-07-19)
rader_transfom\isim\Nouveau dossier\fff\ipcore_dir\xfft_v7_1.xco (1979, 2012-07-19)
rader_transfom\isim\Nouveau dossier\fff\ipcore_dir\xfft_v7_1.xise (4667, 2012-07-19)
rader_transfom\isim\Nouveau dossier\fff\ipcore_dir\_xmsgs\pn_parser.xmsgs (803, 2012-08-03)
rader_transfom\isim\Nouveau dossier\fff\ipcore_dir\_xmsgs (0, 2013-03-15)
rader_transfom\isim\Nouveau dossier\fff\ipcore_dir (0, 2013-03-15)
rader_transfom\isim\Nouveau dossier\fff\iseconfig\fff.projectmgr (5869, 2012-08-03)
... ...
The following files were generated for 'xfft_v7_1' in directory
C:\Users\ENPIE\Desktop\Work\FFT_core\
xfft_v7_1.asy:
Graphical symbol information file. Used by the ISE tools and some
third party tools to create a symbol representing the core.
xfft_v7_1.gise:
ISE Project Navigator support file. This is a generated file and should
not be edited directly.
xfft_v7_1.ngc:
Binary Xilinx implementation netlist file containing the information
required to implement the module in a Xilinx (R) FPGA.
xfft_v7_1.vhd:
VHDL wrapper file provided to support functional simulation. This
file contains simulation model customization data that is passed to
a parameterized simulation model for the core.
xfft_v7_1.vho:
VHO template file containing code that can be used as a model for
instantiating a CORE Generator module in a VHDL design.
xfft_v7_1.xco:
CORE Generator input file containing the parameters used to
regenerate a core.
xfft_v7_1.xise:
ISE Project Navigator support file. This is a generated file and should
not be edited directly.
xfft_v7_1_readme.txt:
Text file indicating the files generated and how they are used.
xfft_v7_1_xmdf.tcl:
ISE Project Navigator interface file. ISE uses this file to determine
how the files output by CORE Generator for the core can be integrated
into your ISE project.
xfft_v7_1_flist.txt:
Text file listing all of the output files produced when a customized
core was generated in the CORE Generator.
Please see the Xilinx CORE Generator online help for further details on
generated files and how to use them.
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