example_vga_1
所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：8081KB
下载次数：2
上传日期：2014-04-29 11:52:38
上 传 者：
Captain-船长
说明： 这个代码时用全志FPGA开发板写的，语音用的是veiloge,功能是用FPGA实现VGA接口硬件连接的实验，FPGA芯片为ALTER EPC4
(When this code is used to write full blog FPGA development board, the voice used is veiloge, function experiments using FPGA VGA interface hardware connections, FPGA chip ALTER EPC4)
文件列表:
8-example_vga_1 (0, 2014-04-19)
8-example_vga_1\8-example_vga_1 (0, 2014-04-19)
8-example_vga_1\8-example_vga_1\ad.v (1237, 2013-10-09)
8-example_vga_1\8-example_vga_1\beep.v (577, 2013-10-07)
8-example_vga_1\8-example_vga_1\db (0, 2014-04-19)
8-example_vga_1\8-example_vga_1\db\ad.map_bb.logdb (4, 2013-10-09)
8-example_vga_1\8-example_vga_1\db\ad.smp_dump.txt (582, 2013-10-09)
8-example_vga_1\8-example_vga_1\db\altsyncram_0124.tdf (30927, 2013-10-09)
8-example_vga_1\8-example_vga_1\db\altsyncram_4124.tdf (105209, 2013-10-09)
8-example_vga_1\8-example_vga_1\db\altsyncram_au14.tdf (13939, 2013-10-09)
8-example_vga_1\8-example_vga_1\db\altsyncram_cu14.tdf (24068, 2013-10-09)
8-example_vga_1\8-example_vga_1\db\altsyncram_eu14.tdf (42032, 2013-10-09)
8-example_vga_1\8-example_vga_1\db\altsyncram_u024.tdf (17197, 2013-10-09)
8-example_vga_1\8-example_vga_1\db\beep.map_bb.logdb (4, 2013-10-06)
8-example_vga_1\8-example_vga_1\db\beep.smp_dump.txt (297, 2013-10-06)
8-example_vga_1\8-example_vga_1\db\cmpr_ngc.tdf (1687, 2013-10-09)
8-example_vga_1\8-example_vga_1\db\cmpr_qgc.tdf (1919, 2013-10-09)
8-example_vga_1\8-example_vga_1\db\cmpr_rgc.tdf (2009, 2013-10-09)
8-example_vga_1\8-example_vga_1\db\cmpr_sgc.tdf (2079, 2013-10-09)
8-example_vga_1\8-example_vga_1\db\cntr_23j.tdf (3301, 2013-10-09)
8-example_vga_1\8-example_vga_1\db\cntr_agi.tdf (3736, 2013-10-09)
8-example_vga_1\8-example_vga_1\db\cntr_bbj.tdf (4500, 2013-10-09)
8-example_vga_1\8-example_vga_1\db\cntr_dgi.tdf (3867, 2013-10-09)
8-example_vga_1\8-example_vga_1\db\cntr_gbj.tdf (4762, 2013-10-09)
8-example_vga_1\8-example_vga_1\db\cntr_ggi.tdf (3998, 2013-10-09)
8-example_vga_1\8-example_vga_1\db\cntr_hbj.tdf (4631, 2013-10-09)
8-example_vga_1\8-example_vga_1\db\cntr_igi.tdf (3867, 2013-10-09)
8-example_vga_1\8-example_vga_1\db\cntr_kgi.tdf (3867, 2013-10-09)
8-example_vga_1\8-example_vga_1\db\cntr_o9j.tdf (4368, 2013-10-09)
8-example_vga_1\8-example_vga_1\db\cntr_vei.tdf (3055, 2013-10-09)
8-example_vga_1\8-example_vga_1\db\decode_dvf.tdf (1568, 2013-10-09)
8-example_vga_1\8-example_vga_1\db\decode_jsa.tdf (1511, 2013-10-09)
8-example_vga_1\8-example_vga_1\db\decode_msa.tdf (2274, 2013-10-09)
8-example_vga_1\8-example_vga_1\db\decode_rsa.tdf (3254, 2013-10-09)
8-example_vga_1\8-example_vga_1\db\dt.map_bb.logdb (4, 2013-10-07)
8-example_vga_1\8-example_vga_1\db\dt.smp_dump.txt (297, 2013-10-07)
8-example_vga_1\8-example_vga_1\db\IR.map_bb.logdb (4, 2013-10-07)
8-example_vga_1\8-example_vga_1\db\IR.smp_dump.txt (582, 2013-10-07)
8-example_vga_1\8-example_vga_1\db\key.map_bb.logdb (4, 2013-10-07)
8-example_vga_1\8-example_vga_1\db\key.smp_dump.txt (297, 2013-10-07)
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