文件列表:

matlab截图及代码\fft_1.m (1803, 2014-05-01)
matlab截图及代码\fft_2.m (1616, 2014-05-01)
matlab截图及代码\IP核处理后的波形.jpg (26830, 2014-05-01)
matlab截图及代码\第一个波形.jpg (29884, 2014-05-01)
matlab截图及代码\第二个波形.jpg (31375, 2014-05-01)
matlab截图及代码 (0, 2014-05-01)
modelsim截图及verilog代码\FFT_analysis\fft_analysis\fft_analysis.gise (4655, 2014-05-01)
modelsim截图及verilog代码\FFT_analysis\fft_analysis\fft_analysis.xise (37831, 2014-05-01)
modelsim截图及verilog代码\FFT_analysis\fft_analysis\fuse.log (1994, 2014-05-01)
modelsim截图及verilog代码\FFT_analysis\fft_analysis\fuse.xmsgs (575, 2014-05-01)
modelsim截图及verilog代码\FFT_analysis\fft_analysis\fuseRelaunch.cmd (240, 2014-05-01)
modelsim截图及verilog代码\FFT_analysis\fft_analysis\ipcore_dir\coregen.cgp (238, 2014-04-30)
modelsim截图及verilog代码\FFT_analysis\fft_analysis\ipcore_dir\coregen.log (319, 2014-04-30)
modelsim截图及verilog代码\FFT_analysis\fft_analysis\ipcore_dir\create_fft.tcl (1259, 2014-04-30)
modelsim截图及verilog代码\FFT_analysis\fft_analysis\ipcore_dir\edit_fft.tcl (1118, 2014-04-30)
modelsim截图及verilog代码\FFT_analysis\fft_analysis\ipcore_dir\fft\doc\xfft_ds260.pdf (1545717, 2014-04-30)
modelsim截图及verilog代码\FFT_analysis\fft_analysis\ipcore_dir\fft\doc\xfft_v7_1_vinfo.html (7184, 2014-04-30)
modelsim截图及verilog代码\FFT_analysis\fft_analysis\ipcore_dir\fft.asy (1468, 2014-04-30)
modelsim截图及verilog代码\FFT_analysis\fft_analysis\ipcore_dir\fft.gise (1344, 2014-05-01)
modelsim截图及verilog代码\FFT_analysis\fft_analysis\ipcore_dir\fft.ngc (928772, 2014-04-30)
modelsim截图及verilog代码\FFT_analysis\fft_analysis\ipcore_dir\fft.sym (3997, 2014-04-30)
modelsim截图及verilog代码\FFT_analysis\fft_analysis\ipcore_dir\fft.v (865888, 2014-04-30)
modelsim截图及verilog代码\FFT_analysis\fft_analysis\ipcore_dir\fft.veo (7872, 2014-04-30)
modelsim截图及verilog代码\FFT_analysis\fft_analysis\ipcore_dir\fft.xco (2206, 2014-04-30)
modelsim截图及verilog代码\FFT_analysis\fft_analysis\ipcore_dir\fft.xise (4969, 2014-04-30)
modelsim截图及verilog代码\FFT_analysis\fft_analysis\ipcore_dir\fft_flist.txt (243, 2014-04-30)
modelsim截图及verilog代码\FFT_analysis\fft_analysis\ipcore_dir\fft_xmdf.tcl (3136, 2014-04-30)
modelsim截图及verilog代码\FFT_analysis\fft_analysis\ipcore_dir\tmp\fft.lso (6, 2014-04-30)
modelsim截图及verilog代码\FFT_analysis\fft_analysis\ipcore_dir\tmp\_cg\_dbg\xil_431.in (2992, 2014-04-30)
modelsim截图及verilog代码\FFT_analysis\fft_analysis\ipcore_dir\tmp\_cg\_dbg\xil_431.out (1179, 2014-04-30)
modelsim截图及verilog代码\FFT_analysis\fft_analysis\ipcore_dir\tmp\_xmsgs\netgen.xmsgs (665, 2014-04-30)
modelsim截图及verilog代码\FFT_analysis\fft_analysis\ipcore_dir\tmp\_xmsgs\pn_parser.xmsgs (765, 2014-04-30)
modelsim截图及verilog代码\FFT_analysis\fft_analysis\ipcore_dir\tmp\_xmsgs\xst.xmsgs (194993, 2014-04-30)
modelsim截图及verilog代码\FFT_analysis\fft_analysis\ipcore_dir\_xmsgs\cg.xmsgs (678, 2014-04-30)
modelsim截图及verilog代码\FFT_analysis\fft_analysis\ipcore_dir\_xmsgs\pn_parser.xmsgs (765, 2014-05-01)
modelsim截图及verilog代码\FFT_analysis\fft_analysis\iseconfig\fft_analysis.projectmgr (8202, 2014-05-01)
modelsim截图及verilog代码\FFT_analysis\fft_analysis\isim\isim_usage_statistics.html (1690, 2014-05-01)
modelsim截图及verilog代码\FFT_analysis\fft_analysis\isim\pn_info (6, 2014-05-01)
modelsim截图及verilog代码\FFT_analysis\fft_analysis\isim\temp\fft.sdb (1875135, 2014-05-01)
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Core name: Xilinx LogiCORE Fast Fourier Transform Version: 7.1 Release: ISE 14.1 Release Date: December 18 2012 ================================================================================ This document contains the following sections: 1. Introduction 2. New Features 3. Supported Devices 4. Resolved Issues 5. Known Issues 6. Technical Support 7. Other Information 8. Core Release History 9. Legal Disclaimer ================================================================================ 1. INTRODUCTION For installation instructions for this release, please go to: http://www.xilinx.com/ipcenter/coregen/ip_update_install_instructions.htm For system requirements: http://www.xilinx.com/ipcenter/coregen/ip_update_system_requirements.htm This file contains release notes for the Xilinx LogiCORE IP Fast Fourier Transform v7.1 solution. For the latest core updates, see the product page at: http://www.xilinx.com/products/ipcenter/FFT.htm ................................................................................ 2. NEW FEATURES - ISE 14.4 software support - ISE 14.1 software support - ISE 13.4 software support - ISE 13.3 software support - ISE 13.2 software support - Support for Artix-7 with ISE 13.2 - ISE 13.1 software support ................................................................................ 3. SUPPORTED DEVICES The following device families are supported by the core for this release. All 7 Series devices All Virtex-6 devices All Spartan-6 devices All Virtex-5 devices All Virtex-4 devices All Spartan-3 devices ................................................................................ 4. RESOLVED ISSUES - Illegal configurations of Spartan-6 RAMB8BWER Block RAM primitive. - Symptom: Map error due to incorrect configurations of Spartan-6 Block RAM primitives. - Workaround: None. - Version fixed: 7.1 - CR552350 ................................................................................ 5. KNOWN ISSUES The most recent information, including known issues, workarounds, and resolutions for this version is provided in the IP Release Notes Guide located at www.xilinx.com/support/documentation/user_guides/xtp025.pdf The following are known issues for v7.1 of this core at time of release: 1. The bit-accurate C model and Matlab MEX function for the FFT core can return incorrect results when configured to perform a Block Floating-Point FFT using the Pipelined, Streaming I/O architecture. - CR 639407 - AR 53087 ................................................................................ 6. TECHNICAL SUPPORT To obtain technical support, create a WebCase at www.xilinx.com/support. Questions are routed to a team with expertise using this product. Xilinx provides technical support for use of this product when used according to the guidelines described in the core documentation, and cannot guarantee timing, functionality, or support of this product for designs that do not follow specified guidelines. ................................................................................ 7. OTHER INFORMATION - None ................................................................................ 8. CORE RELEASE HISTORY Date By Version Description ================================================================================ 12/18/2012 Xilinx, Inc. 7.1 ISE 14.4 support 04/24/2012 Xilinx, Inc. 7.1 ISE 14.1 support 01/11/2012 Xilinx, Inc. 7.1 ISE 13.4 support 10/19/2011 Xilinx, Inc. 7.1 ISE 13.3 support 06/22/2011 Xilinx, Inc. 7.1 ISE 13.2 support, Artix-7 support 03/01/2011 Xilinx, Inc. 7.1 ISE 13.1 support, Virtex-7 and Kintex-7 support 04/19/2010 Xilinx, Inc. 7.1 ISE 12.1 support. Bugfixes. 12/02/2009 Xilinx, Inc. 7.0 ISE 11.4 support, Spartan-6L support. 09/16/2009 Xilinx, Inc. 7.0 ISE 11.3 support, Virtex-6L support. 06/24/2009 Xilinx, Inc. 7.0 ISE 11.2 support, Virtex-6/Spartan-6 support. 09/19/2008 Xilinx, Inc. 6.0 ISE 10.1 support. Features added. Bugfixes. 10/10/2007 Xilinx, Inc. 5.0 ISE 9.2i support. Features added. Bugfixes. ================================================================================ ................................................................................ 9. LEGAL DISCLAIMER (c) Copyright 2000 - 2012 Xilinx, Inc. All rights reserved. This file contains confidential and proprietary information of Xilinx, Inc. and is protected under U.S. and international copyright and other intellectual property laws. DISCLAIMER This disclaimer is not a license and does not grant any rights to the materials distributed herewith. Except as otherwise provided in a valid license issued to you by Xilinx, and to the maximum extent permitted by applicable law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and (2) Xilinx shall not be liable (whether in contract or tort, including negligence, or under any other theory of liability) for any loss or damage of any kind or nature related to, arising under or in connection with these materials, including for any direct, or any indirect, special, incidental, or consequential loss or damage (including loss of data, profits, goodwill, or any type of loss or damage suffered as a result of any action brought by a third party) even if such damage or loss was reasonably foreseeable or Xilinx had been advised of the possibility of the same. CRITICAL APPLICATIONS Xilinx products are not designed or intended to be fail- safe, or for use in any application requiring fail-safe performance, such as life-support or safety devices or systems, Class III medical devices, nuclear facilities, applications related to the deployment of airbags, or any other applications that could lead to death, personal injury, or severe property or environmental damage (individually and collectively, "Critical Applications"). Customer assumes the sole risk and liability of any use of Xilinx products in Critical Applications, subject only to applicable laws and regulations governing limitations on product liability. THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS PART OF THIS FILE AT ALL TIMES.

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