frequency-divider
所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：480KB
下载次数：5
上传日期：2014-06-26 15:49:58
上 传 者：
zybaiwq
说明： 用VERILOG 语言写的数控分频器，可能输入时钟信号实现任意整数倍的分频，
(NC divider, with the words written in VERILOG HDL, can achieve any integer multiple of the input clock frequency, contains the entire project file.)
文件列表:
实验十 数控分频器的设计\cmp_state.ini (2, 2006-09-09)
实验十 数控分频器的设计\db\dvf.(0).cnf.cdb (1617, 2012-01-30)
实验十 数控分频器的设计\db\dvf.(0).cnf.hdb (816, 2012-01-30)
实验十 数控分频器的设计\db\dvf.(1).cnf.cdb (1677, 2012-01-30)
实验十 数控分频器的设计\db\dvf.(1).cnf.hdb (821, 2012-01-30)
实验十 数控分频器的设计\db\dvf.(2).cnf.cdb (1715, 2012-01-30)
实验十 数控分频器的设计\db\dvf.(2).cnf.hdb (808, 2012-01-30)
实验十 数控分频器的设计\db\dvf.(3).cnf.cdb (7176, 2012-01-30)
实验十 数控分频器的设计\db\dvf.(3).cnf.hdb (2379, 2012-01-30)
实验十 数控分频器的设计\db\dvf.asm.qmsg (2178, 2012-01-30)
实验十 数控分频器的设计\db\dvf.asm_labs.ddb (6499, 2012-01-30)
实验十 数控分频器的设计\db\dvf.cbx.xml (85, 2012-01-30)
实验十 数控分频器的设计\db\dvf.cmp.cdb (30948, 2012-01-30)
实验十 数控分频器的设计\db\dvf.cmp.hdb (12541, 2012-01-30)
实验十 数控分频器的设计\db\dvf.cmp.kpt (334, 2012-01-30)
实验十 数控分频器的设计\db\dvf.cmp.logdb (4, 2012-01-30)
实验十 数控分频器的设计\db\dvf.cmp.rdb (26114, 2012-01-30)
实验十 数控分频器的设计\db\dvf.cmp.tdb (26668, 2012-01-30)
实验十 数控分频器的设计\db\dvf.cmp0.ddb (104951, 2012-01-30)
实验十 数控分频器的设计\db\dvf.cmp2.ddb (48351, 2012-01-30)
实验十 数控分频器的设计\db\dvf.db_info (137, 2012-01-30)
实验十 数控分频器的设计\db\dvf.eco.cdb (161, 2014-06-26)
实验十 数控分频器的设计\db\dvf.fit.qmsg (41250, 2012-01-30)
实验十 数控分频器的设计\db\dvf.hier_info (6213, 2012-01-30)
实验十 数控分频器的设计\db\dvf.hif (2076, 2012-01-30)
实验十 数控分频器的设计\db\dvf.lpc.html (1584, 2012-01-30)
实验十 数控分频器的设计\db\dvf.lpc.rdb (467, 2012-01-30)
实验十 数控分频器的设计\db\dvf.lpc.txt (1908, 2012-01-30)
实验十 数控分频器的设计\db\dvf.map.cdb (9080, 2012-01-30)
实验十 数控分频器的设计\db\dvf.map.hdb (12127, 2012-01-30)
实验十 数控分频器的设计\db\dvf.map.logdb (4, 2012-01-30)
实验十 数控分频器的设计\db\dvf.map.qmsg (7809, 2012-01-30)
实验十 数控分频器的设计\db\dvf.pre_map.cdb (8700, 2012-01-30)
实验十 数控分频器的设计\db\dvf.pre_map.hdb (12134, 2012-01-30)
实验十 数控分频器的设计\db\dvf.rtlv.hdb (12088, 2012-01-30)
实验十 数控分频器的设计\db\dvf.rtlv_sg.cdb (9457, 2012-01-30)
实验十 数控分频器的设计\db\dvf.rtlv_sg_swap.cdb (1059, 2012-01-30)
实验十 数控分频器的设计\db\dvf.sgdiff.cdb (8268, 2012-01-30)
实验十 数控分频器的设计\db\dvf.sgdiff.hdb (12701, 2012-01-30)
实验十 数控分频器的设计\db\dvf.sld_design_entry.sci (154, 2014-06-26)
... ...
This folder contains data for incremental compilation.
The compiled_partitions sub-folder contains previous compilation results for each partition.
As long as this folder is preserved, incremental compilation results from earlier compiles
can be re-used. To perform a clean compilation from source files for all partitions, both
the db and incremental_db folder should be removed.
The imported_partitions sub-folder contains the last imported QXP for each imported partition.
As long as this folder is preserved, imported partitions will be automatically re-imported
when the db or incremental_db/compiled_partitions folders are removed.
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