文件列表:

STM32F103加减速\4motorV2\CM3\core_cm3.c (16249, 2009-04-06)
STM32F103加减速\4motorV2\CM3\core_cm3.h (42077, 2009-04-06)
STM32F103加减速\4motorV2\CM3\startup\arm\startup_stm32f10x_hd.s (15872, 2009-04-06)
STM32F103加减速\4motorV2\CM3\startup\arm\startup_stm32f10x_ld.s (12236, 2009-04-06)
STM32F103加减速\4motorV2\CM3\startup\arm\startup_stm32f10x_md.s (12564, 2009-04-06)
STM32F103加减速\4motorV2\CM3\startup\gcc\startup_stm32f10x_hd.c (16437, 2009-04-06)
STM32F103加减速\4motorV2\CM3\startup\gcc\startup_stm32f10x_ld.c (12790, 2009-04-06)
STM32F103加减速\4motorV2\CM3\startup\gcc\startup_stm32f10x_md.c (13104, 2009-04-06)
STM32F103加减速\4motorV2\CM3\startup\iar\startup_stm32f10x_hd.s (16573, 2009-04-06)
STM32F103加减速\4motorV2\CM3\startup\iar\startup_stm32f10x_ld.s (12001, 2009-04-06)
STM32F103加减速\4motorV2\CM3\startup\iar\startup_stm32f10x_md.s (12492, 2009-04-06)
STM32F103加减速\4motorV2\CM3\stm32f10x.h (530869, 2009-04-06)
STM32F103加减速\4motorV2\CM3\system_stm32f10x.c (24166, 2009-04-06)
STM32F103加减速\4motorV2\CM3\system_stm32f10x.h (2158, 2009-04-06)
STM32F103加减速\4motorV2\MDK\JLinkArm_test.ini (205, 2009-10-07)
STM32F103加减速\4motorV2\MDK\JLinkLog.txt (10722, 2012-10-24)
STM32F103加减速\4motorV2\MDK\JLinkSettings.ini (573, 2012-04-05)
STM32F103加减速\4motorV2\MDK\List\startup_stm32f10x_hd.lst (53911, 2012-12-17)
STM32F103加减速\4motorV2\MDK\List\startup_stm32f10x_ld.lst (40277, 2012-07-19)
STM32F103加减速\4motorV2\MDK\List\test.map (60618, 2013-01-13)
STM32F103加减速\4motorV2\MDK\Obj\core_cm3.crf (3523, 2012-12-17)
STM32F103加减速\4motorV2\MDK\Obj\core_cm3.d (86, 2012-12-17)
STM32F103加减速\4motorV2\MDK\Obj\core_cm3.o (10128, 2012-12-17)
STM32F103加减速\4motorV2\MDK\Obj\ExtDll.iex (19, 2012-07-20)
STM32F103加减速\4motorV2\MDK\Obj\main.crf (284076, 2013-01-13)
STM32F103加减速\4motorV2\MDK\Obj\main.o (310816, 2013-01-13)
STM32F103加减速\4motorV2\MDK\Obj\misc.crf (256723, 2012-12-17)
STM32F103加减速\4motorV2\MDK\Obj\misc.d (735, 2012-12-17)
STM32F103加减速\4motorV2\MDK\Obj\misc.o (278296, 2012-12-17)
STM32F103加减速\4motorV2\MDK\Obj\speed_cntr.crf (263181, 2012-10-24)
STM32F103加减速\4motorV2\MDK\Obj\speed_cntr.d (791, 2012-10-24)
STM32F103加减速\4motorV2\MDK\Obj\speed_cntr.o (288780, 2012-10-24)
STM32F103加减速\4motorV2\MDK\Obj\startup_stm32f10x_hd.d (73, 2012-12-17)
STM32F103加减速\4motorV2\MDK\Obj\startup_stm32f10x_hd.o (6708, 2012-12-17)
STM32F103加减速\4motorV2\MDK\Obj\startup_stm32f10x_ld.d (73, 2012-07-19)
STM32F103加减速\4motorV2\MDK\Obj\startup_stm32f10x_ld.o (5584, 2012-07-19)
STM32F103加减速\4motorV2\MDK\Obj\stm32f10x_can.crf (268706, 2012-12-17)
STM32F103加减速\4motorV2\MDK\Obj\stm32f10x_can.d (879, 2012-12-17)
STM32F103加减速\4motorV2\MDK\Obj\stm32f10x_can.o (291564, 2012-12-17)
STM32F103加减速\4motorV2\MDK\Obj\stm32f10x_crc.crf (255165, 2012-12-17)
... ...

/** @page GPIO_IOToggle GPIO IO Toggle example @verbatim ******************** (C) COPYRIGHT 2011 STMicroelectronics ******************* * @file GPIO/IOToggle/readme.txt * @author MCD Application Team * @version V1.0.0 * @date 30-September-2011 * @brief Description of the GPIO IO Toggle example. ****************************************************************************** * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. ****************************************************************************** @endverbatim @par Example Description GPIO ports are connected on AHB bus, using BSRRH and BSRRL registers one cycle is required to set a pin and another cycle to reset it. So GPIO pins can toggle at AHB clock divided by 2. This example describes how to use BSRRH and BSRRL (Port Bit Set/Reset Register High and Low) for maximum IO toggling. PG6 and PG8 (configured in output pushpull mode) toggles in a forever loop: - Set PG6 and PG8 by setting corresponding bits in BSRRL register - Reset PG6 and PG8 by setting corresponding bits in BSRRH register In this example, HCLK is configured at 168 MHz so PG6 and PG8 toggles at 84MHz. To achieve the maximum IO toggling frequency, you have to configure your compiler options for high speed optimization. @par Directory contents - GPIO/IOToggle/stm32f4xx_conf.h Library Configuration file - GPIO/IOToggle/stm32f4xx_it.c Interrupt handlers - GPIO/IOToggle/stm32f4xx_it.h Interrupt handlers header file - GPIO/IOToggle/main.c Main program - GPIO/IOToggle/system_stm32f4xx.c STM32F4xx system source file @note The "system_stm32f4xx.c" is generated by an automatic clock configuration tool and can be easily customized to your own configuration. To select different clock setup, use the "STM32F4xx_Clock_Configuration_V1.0.0.xls" provided with the AN3***8 package available on ST Microcontrollers @par Hardware and Software environment - This example runs on STM32F4xx Devices. - This example has been tested with STM324xG-EVAL RevB and can be easily tailored to any other development board - STM324xG-EVAL Set-up - Use LED1 and LED2 connected respectively to PG.06 and PG.08 @par How to use it ? In order to make the program work, you must do the following : - Copy all source files from this example folder to the template folder under Project\STM32F4xx_StdPeriph_Templates - Open your preferred toolchain - Rebuild all files and load your image into target memory - Run the example *

© COPYRIGHT 2011 STMicroelectronics

*/

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