SPI-flash
所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：136KB
下载次数：147
上传日期：2014-08-14 15:54:01
上 传 者：
futurehome
说明： ST公司的M25Pxx SPI flash memory的verilog仿真模型，该模型准确地描述了SPI flash memory的行为，包括读，写，擦除等操作，可以用来挂在带有SPI接口的soc外部，方便验证SPI接口。
(ST' s verilog simulation model M25Pxx SPI flash memory, the model accurately describes the SPI flash memory behavior, including reading, writing, erasing and other operations can be used to hang outside the soc with SPI interface to facilitate verification SPI interface.)
文件列表:
SPI flash\M25P05A_VG_1.0_50MHZ\code\acdc_check.v (12335, 2011-02-09)
SPI flash\M25P05A_VG_1.0_50MHZ\code\internal_logic.v (45744, 2011-02-09)
SPI flash\M25P05A_VG_1.0_50MHZ\code\M25P05A.v (1245, 2011-02-09)
SPI flash\M25P05A_VG_1.0_50MHZ\code\memory_access.v (5331, 2011-02-09)
SPI flash\M25P05A_VG_1.0_50MHZ\code\parameter.v (2936, 2011-02-09)
SPI flash\M25P05A_VG_1.0_50MHZ\converter1.1.exe (176236, 2011-02-09)
SPI flash\M25P05A_VG_1.0_50MHZ\doc\UM0190.pdf (94017, 2011-02-09)
SPI flash\M25P05A_VG_1.0_50MHZ\sim\cds.lib (72, 2011-02-09)
SPI flash\M25P05A_VG_1.0_50MHZ\sim\hdl.var (67, 2011-02-09)
SPI flash\M25P05A_VG_1.0_50MHZ\sim\initM25P05a.txt (197117, 2011-02-09)
SPI flash\M25P05A_VG_1.0_50MHZ\sim\initmemory.txt (197117, 2011-02-09)
SPI flash\M25P05A_VG_1.0_50MHZ\sim\run (733, 2011-02-09)
SPI flash\M25P05A_VG_1.0_50MHZ\stim\M25P05A_driver.v (34371, 2011-02-09)
SPI flash\M25P05A_VG_1.0_50MHZ\stim\testbench.v (818, 2011-02-09)
SPI flash\M25P05A_VG_1.0_50MHZ\code (0, 2013-11-19)
SPI flash\M25P05A_VG_1.0_50MHZ\doc (0, 2013-11-19)
SPI flash\M25P05A_VG_1.0_50MHZ\sim (0, 2013-11-19)
SPI flash\M25P05A_VG_1.0_50MHZ\stim (0, 2013-11-19)
SPI flash\M25P05A_VG_1.0_50MHZ (0, 2013-11-19)
SPI flash (0, 2013-11-19)
REV 1.0: Patch for the problem of "Chip Select goes high while device in the Hold Condition".
Patch for the race condition of address assigning in "Memory_Access".
=======================================================================================
WARNING : These Verilog models are provided "as is" without warranty of any kind,
including, but not limited to, any implied warranty of merchantability and fitness
for a particular purpose.
=======================================================================================
PROJECT ARCHITECTURE
Parameter.v
|
TestBench.v
|--------------> M25Pxx.v
| |--------------> memory_access.v
| |--------------> internal_logic.v
| |--------------> acdc_check.v
| |--------------> parameter.v
|
|--------------> M25Pxx_driver.v
The project should be compiled in the following order :
- parameter.v : define all constants
- memory_access.v : perform read/write operations
- internal_logic.v : describe internal working
- acdc_check.v : check if timings respect datasheet.
- m25pxx.v : external description of Serial Flash
- m25pxx_driver.v : stimuli + library of operations example
- testbench.v : a testbench example
TECHNICAL SUPPORT
For current information on M25Pxx products, please consult our pages on the world wide web:
www.st.com/
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