cpu5.10_modelsim
所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：2599KB
下载次数：5
上传日期：2014-08-16 16:31:27
上 传 者：
ustb_liu
说明： 用verilog编写的8位最简cpu代码，能实现简单的加减运算，存储运算，以及寄存器操作。
(Verilog prepared with 8 simple CPU code, to achieve a simple addition and subtraction, memory operations, as well as register operations.)
文件列表:
cpu5.10_modelsim\accum.v (261, 2013-05-01)
cpu5.10_modelsim\addr_decode.v (390, 2013-05-01)
cpu5.10_modelsim\adr.v (160, 2013-05-01)
cpu5.10_modelsim\alu.v (786, 2013-05-01)
cpu5.10_modelsim\clk_gen.v (985, 2013-05-10)
cpu5.10_modelsim\clk_gen.v.bak (959, 2013-05-10)
cpu5.10_modelsim\counter.v (357, 2013-05-01)
cpu5.10_modelsim\cpu.asm.rpt (6312, 2013-05-10)
cpu5.10_modelsim\cpu.done (26, 2013-05-10)
cpu5.10_modelsim\cpu.eda.rpt (7033, 2013-05-10)
cpu5.10_modelsim\cpu.fit.rpt (203317, 2013-05-10)
cpu5.10_modelsim\cpu.fit.smsg (513, 2013-05-10)
cpu5.10_modelsim\cpu.fit.summary (593, 2013-05-10)
cpu5.10_modelsim\cpu.flow.rpt (9545, 2013-05-10)
cpu5.10_modelsim\cpu.map.rpt (30295, 2013-05-10)
cpu5.10_modelsim\cpu.map.smsg (129, 2013-05-10)
cpu5.10_modelsim\cpu.map.summary (451, 2013-05-10)
cpu5.10_modelsim\cpu.pin (20625, 2013-05-10)
cpu5.10_modelsim\cpu.qpf (1255, 2013-05-09)
cpu5.10_modelsim\cpu.qsf (4509, 2013-05-10)
cpu5.10_modelsim\cpu.qws (1403, 2013-05-10)
cpu5.10_modelsim\cpu.sof (358317, 2013-05-10)
cpu5.10_modelsim\cpu.sta.rpt (310733, 2013-05-10)
cpu5.10_modelsim\cpu.sta.summary (1850, 2013-05-10)
cpu5.10_modelsim\cpu.v (1570, 2013-05-10)
cpu5.10_modelsim\cpu.v.bak (1583, 2013-05-10)
cpu5.10_modelsim\cpu.vo (27628, 2013-05-09)
cpu5.10_modelsim\cputop.v (5440, 2013-05-10)
cpu5.10_modelsim\cputop.v.bak (5439, 2013-05-10)
cpu5.10_modelsim\cpu_nativelink_simulation.rpt (993, 2013-05-10)
cpu5.10_modelsim\datactl.v (148, 2013-05-01)
cpu5.10_modelsim\db\cpu.(0).cnf.cdb (4002, 2013-05-10)
cpu5.10_modelsim\db\cpu.(0).cnf.hdb (1889, 2013-05-10)
cpu5.10_modelsim\db\cpu.(1).cnf.cdb (2625, 2013-05-10)
cpu5.10_modelsim\db\cpu.(1).cnf.hdb (874, 2013-05-10)
cpu5.10_modelsim\db\cpu.(2).cnf.cdb (2737, 2013-05-09)
cpu5.10_modelsim\db\cpu.(2).cnf.hdb (996, 2013-05-09)
cpu5.10_modelsim\db\cpu.(3).cnf.cdb (1528, 2013-05-09)
cpu5.10_modelsim\db\cpu.(3).cnf.hdb (827, 2013-05-09)
cpu5.10_modelsim\db\cpu.(4).cnf.cdb (2500, 2013-05-09)
... ...
This folder contains data for incremental compilation.
The compiled_partitions sub-folder contains previous compilation results for each partition.
As long as this folder is preserved, incremental compilation results from earlier compiles
can be re-used. To perform a clean compilation from source files for all partitions, both
the db and incremental_db folder should be removed.
The imported_partitions sub-folder contains the last imported QXP for each imported partition.
As long as this folder is preserved, imported partitions will be automatically re-imported
when the db or incremental_db/compiled_partitions folders are removed.
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