文件列表:

LPC3250_Serial_Boot\W25Q16V.pdf (1610364, 2008-12-26)
LPC3250_Serial_Boot\Common\inc\irq.h (1889, 2008-12-29)
LPC3250_Serial_Boot\Common\inc\LPC318x.h (35798, 2008-12-29)
LPC3250_Serial_Boot\Common\inc\mem_b.scf (824, 2008-12-29)
LPC3250_Serial_Boot\Common\inc\ports.h (714, 2008-12-24)
LPC3250_Serial_Boot\Common\inc\ssp0.h (781, 2008-12-24)
LPC3250_Serial_Boot\Common\inc\target.h (1550, 2008-12-29)
LPC3250_Serial_Boot\Common\inc\timer.h (795, 2008-12-29)
LPC3250_Serial_Boot\Common\inc\type.h (745, 2008-12-29)
LPC3250_Serial_Boot\Common\src\heap.s (725, 2008-12-29)
LPC3250_Serial_Boot\Common\src\irq.c (10536, 2008-12-29)
LPC3250_Serial_Boot\Common\src\stack.s (714, 2008-12-29)
LPC3250_Serial_Boot\Common\src\Startup.s (6052, 2008-12-29)
LPC3250_Serial_Boot\Common\src\swi_handler.s (3237, 2008-12-29)
LPC3250_Serial_Boot\Common\src\target.c (3021, 2008-12-29)
LPC3250_Serial_Boot\Common\src\timer.c (3764, 2008-12-29)
LPC3250_Serial_Boot\Demo\demo.c (3581, 2008-12-29)
LPC3250_Serial_Boot\Demo\demo.opt.bak (3990, 2008-12-29)
LPC3250_Serial_Boot\Demo\demo.Uv2.bak (4920, 2008-12-24)
LPC3250_Serial_Boot\Demo\demo.uvgui.LGC (69115, 2013-10-29)
LPC3250_Serial_Boot\Demo\demo.uvopt (18074, 2013-10-29)
LPC3250_Serial_Boot\Demo\demo.uvproj (30208, 2013-10-29)
LPC3250_Serial_Boot\Demo\demo_LPC318x Debug.dep (1555, 2013-10-29)
LPC3250_Serial_Boot\Demo\demo_Opt.Bak (3991, 2008-12-29)
LPC3250_Serial_Boot\Demo\demo_Uv2.Bak (5058, 2008-12-23)
LPC3250_Serial_Boot\Demo\RAM.ini (874, 2008-12-24)
LPC3250_Serial_Boot\Demo\Lst\demo.map (50443, 2013-10-29)
LPC3250_Serial_Boot\Demo\Lst\Startup.lst (26557, 2013-10-29)
LPC3250_Serial_Boot\Demo\Lst\swi_handler.lst (10519, 2013-10-29)
LPC3250_Serial_Boot\Demo\Obj\demo.axf (21444, 2013-10-29)
LPC3250_Serial_Boot\Demo\Obj\demo.d (169, 2013-10-29)
LPC3250_Serial_Boot\Demo\Obj\demo.hex (8098, 2013-10-29)
LPC3250_Serial_Boot\Demo\Obj\demo.htm (21048, 2013-10-29)
LPC3250_Serial_Boot\Demo\Obj\demo.lnp (354, 2013-10-29)
LPC3250_Serial_Boot\Demo\Obj\demo.o (42268, 2013-10-29)
LPC3250_Serial_Boot\Demo\Obj\demo.plg (775, 2013-10-29)
LPC3250_Serial_Boot\Demo\Obj\demo.tra (1172, 2013-10-29)
LPC3250_Serial_Boot\Demo\Obj\irq.d (141, 2013-10-29)
LPC3250_Serial_Boot\Demo\Obj\irq.o (45052, 2013-10-29)
... ...

/***************************************************************************** * readme.1st: Description of the LPC3000 Serial Boot Example * * NXP Semiconductors, 2008 * * History * 2008.12.27 ver 1.00 Preliminary version, first Release * ******************************************************************************/ /*****************************************************************************/ Software that is described herein is for illustrative purposes only which provides customers with programming information regarding the products. This software is supplied "AS IS" without any warranties. NXP Semiconductors assumes no responsibility or liability for the use of the software, conveys no license or title under any patent, copyright, or mask work right to the product. NXP Semiconductors reserves the right to make changes in the software without notification. NXP Semiconductors also make no representation or warranty that such application will be suitable for the specified use without further testing or modification. /*****************************************************************************/ The Description of the sample software ====================================== The LPC3000 Serial Boot Example software has been developed on the previously published "Sample Code Bundle for LPC3180 Peripherals using Keil's MDK-ARM and RVDS" package. For details on this software please visit http://www.nxp.com/microcontrollers and select "software" under "support documents". The LPC3000 Serial Boot Example software has been tested on a Keil uVision MDK software development platform. While this particular example was developed using a full-licensed Keil tool, the example code should be easily compiled and executed using an evaluation version of the same tool that is limited to application’s size of 16 kB. If another development tool is used different restrictions might be observed. The target LPC3250 board is a custom developed board with a 13 MHz main crystal and a Winbond 2Mbit SPI Flash memory (W25Q16) on the SPI1/SSP0 interface. Because of the selected SPI Flash device the LPC3250 SPI1_DATIN line has a weak pull-down (10 kOhm) on it as per the SPI Boot specification (see Boot Process chapter in the selected LPC3000 User Manual for details). The sample software includes a common library, demo module, SPI Flash write module, tool folder, and scope folder. The common folder ================= The common library includes a startup file, standard definition and header files, processor specific setup module, generic interrupt handler and related APIs, timer routine, and scatter loading file. The demo folder =============== The demo directory includes a simple demo code developed for illustration purposes only. When executed the demo code toggles a selected pin (SSEL1/GPIO_04) producing a test waveform. The SPI Flash write folder ========================== The SPI Flash write module was designed so that the SPI Flash memory already embedded in the target system could be programmed using the same debug environment utilized for the end user application development. The programming application takes the content specified by the user and burns it into the SPI Flash memory using the SPI1/SSP0 interface. This particular SPI Flash programming module was developed to support programming of a Winbond W25Q16 2Mbit Flash memory (datasheet provided with the example). SPI Flash memories made by different semiconductor vendors might support different sets of commands. Therefore only the very basic set of commands needed for programming a SPI Flash memory was used here. A quick study performed by NXP showed that memory prepare, program, status read, and memory read instruction formats for SPI Flash/EEPROM memory devices of at least *** kB in size seemed to be the same for major SPI Flash/EEPROM manufacturers. However, the end user is advised to make sure that the target system SPI memory's instructions formats match those used here and/or make necessary modifications to the programming code. The tool folder =============== The tool folder contains a simple DOS based tool. This tool takes data from the hex file specified by the user (i.e. the end user application ultimately stored in the SPI memory), adds necessary SPI boot header (the signature field and the size field as specified in the microcontroller's manual) and generates three new files: "L3k_boot.bin", "L3k_boot.hex", and "L3k_boot.h". The "L3k_boot.bin" and "L3k_boot.hex" files are generated so that the selected SPI memory can be programmed using a commercial stand-alone chip/memory programming equipment. These files are only 8 bytes longer than the original application size because of the SPI boot header add-on (4 bytes for the signature and 4 bytes for the application size). The "L3k_boot.h" file is used by the SPI write code provided in this example. This particular header file is listed in the "include..." section of the "spi_flash_write.c" file in the "SPI_Flash_write" folder. Two variables and an array are defined in the L3k_boot.h file. The "boot_data_size" integer is initialized with the length of the code developed by the user without any modifications to its size. The "boot_data_size256" is initialized with the number that matches the original application size plus the SPI boot header section (8 bytes) rounded to the next value divisible by 256. The count of 256 is the page size for the selected Winbond SPI Flash memory (and for that matter for majority of other SPI Flash/EEPROM memory devices). Since the most efficient way to program a SPI memory is to transfer data page after page, the count of 256 bytes was selected so that the Flash programming code can be simplified. The "boot_data[]" array contains the content that will be programmed into the SPI flash memory from which the microcontroller will boot after a reset. This array contains the SPI boot header as well as the necessary padding appended to the user code. The conversion tool is not related to any particular microcontroller development environment. It simply opens the specified hex file and processes it. The conversion tool performs the input file format/content check yet it does not check if the content specified in the input file exceeds the 56 kB size limit for the boot code. It is up to the user to check if the value of the "boot_data_size" variable is beyond 56 kB. The scope folder ================ This folder contains scope screenshots obtained while developing this LPC3000 serial boot example. It contains a boot and a write process dedicated subfolder. These folders content will be described following the next chapter. How to use the LPC3000 Serial Boot Example (or how things work around here...) ============================================================================== Step 1: read the Boot process chapter in the selected LPC3000 device User Manual. Hardware requirements (the SPI1_DATIN line pull up/down selection), software requirements (boot code size), and overall details of how the boot process works are explained there. Step 2: develop your own LPC3000 application using the "Demo" folder from this example or simply compile the existing code already provided here. Keep in mind that your application code must not get beyond the RAM location of 0x0800_DFFF. The on-chip RAM as of 0x0800_E000 is used for the Boot Stack purposes. If in doubt whether your code size goes beyond this limit or not, study the "demo.map" file in the "Demo\Lst" folder created after compiling your/demo application. Step 2: copy the "demo.hex" file created in Step 1 from the "Demo\Obj" folder into the "Tools" folder. Step 3: run the "L3k_boot.exe" conversion application in the "Tools" folder. This is a DOS based application that has an eight-letter file name and three-letter file extension limitation. The conversion tool will ask for an input filename. If you are using the example environment and files created in it, this name is "demo.hex". The next input the tool needs is the unused memory location content. In most cases FF is entered here. For a typical screen output when running the conversion tool see the "tools_executed.jpg" in the "Tools" folder. Step 4: copy the "L3k_boot.h" file from the "Tools" folder into the "SPI_write_flash" folder. The "SPI_write_flash.c" code is intended for in-system programming of the SPI memory. This helps the end user program the code into the memory already attached to the microcontroller's SPI1/SSP0 interface. Before compiling the "SPI_write_flash" application please make sure that the SPI memory commands used in the "spi_flash_write.c" and those supported by the SPI memory device actually used in the target system are compatible. If needed, make necessary changes to the "spi_flash_write.c" code. Compile the "spi_write_flash" application. This application will take data from the supplied "L3k_boot.h" file and program it page by page (256 bytes after 256 bytes) into the SPI memory connected to the SPI1/SSP0 interface. The content of the "L3k_boot.h" file matches the boot code spec as described in the LPC3000 User Manual. If running the "spi_write_flash" code from a debugger, a breakpoint at "return 0" can be used to indicate the end of run. Depending on the selected SPI memory the actual programming time can take less or more time due to a potentially long full chip erase command that is used (Note: for the Winbond memory used in this demo it took 9 seconds to perform full chip erase – see scope\write folder for scope screenshots). Once the SPI memory is erased and the bottom *** kB are confirmed to be blank, a page after a page (each 256 bytes in size) is sent to the SPI memory. After each page is programmed its content is verified, too. If there is a discrepancy between the content programmed and the content read, the code stops executing and enters an infinite loop. Step 5: after the SPI memory is successfully programmed, perform a reset to the system and wait. If the hardware settings are correct and no other boot sources are there, the LPC3000 device will boot from the attached SPI memory and execute the code from it. The scope folder ================ This folder contains scope screenshots of the write and the boot process for the demo supplied in this example. The scope\write folder ====================== The "...overview" file contains a view from the beginning to the end of the demo code being programmed into a Winbond SPI Flash memory (W25Q16V). The "...begin" file shows a test pattern (0xA3) being sent to the serial interface, a "write enable" command sent to the memory (0x06 on the MOSI line), a "read status register" command (0x05) followed by a response from the memory with the WEL bit being set. The LPC3000 device sends a "chip erase" command (0xC7) and begins polling the Status register using a "read status register" command waiting for both the WEL and the BUSY bits to become 0. The "...erase_blankcheck" file shows the end of a full chip erase cycle (the Status register readout on the MISO line finally becoming 0) and a software blankcheck cycle begin. The blankcheck begins with a "read data" command (0x03) followed by a three-byte address (0x000000). The software reads *** kB of data and makes sure that all bytes are read as 0xFF. It can be seen that the MISO line during this process is constantly set to a high output. The "...page_overview" file shows how typical page write cycles look like. The "...page0_begin" file shows a "write enable" command followed by a "read status register" command sent. After this a "page program" command (0x02) as of Flash address 0x000000 (page 0) follows with 256 bytes of data. At the beginning of this page the key (0x13579BDF) is sent and a part of it can be easily identified in this screenshot. The "...page0_write" file shows polling phase of the Status register using a "read status register" command. The polling loop is active until both the WEL and the BUSY both become 0. The "...page0_read" file shows the end of a "page program" command (both the WEL and the BUSY bit becoming 0) followed by a "read data" command from address 0x000000. As of this moment the CPU will read 256 bytes from the SPI Flash memory and compare the data read with the data intended to be programmed. The "...page1_begin" shows how data write process for page 1 (address 0x000100) begins. The scope\boot folder ===================== The "...overview" file contains a view from the beginning to the end of the boot process. The "...begin" file zooms into the very beginning of the SPI boot process. A read command (0x03 on the MOSI line) from address 0x000000 (SPI Flash - 3 address bytes on the MOSI line) is followed by a signature response from the memory on the MISO line (due to Little-Endian data format the 0x13579BDF key is read as 0xDF followed by 0x9B, 0x57, and 0x13). After this the data length follows (0x00000D2C...). The "...end" file shows how the demo application boot process ends. After the last byte of the boot code is loaded, the CPU begins its execution. The demo code provided in this example generates a pulse pattern on the SSEL1/GPIO_04 LPC3000 pin. Four groups of low-high-low-high pulses are infinitely generated. The next group of pulses lasts twice the previous did.

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