ml402_emb_ref_81
所属分类：VHDL/FPGA/Verilog
开发工具：Others
文件大小：938KB
下载次数：7
上传日期：2014-09-01 20:42:34
上 传 者：
Xsteam
说明： xilinx ML402 开发板的 edk 例程
(the EDK demo of xilinx ML402)
文件列表:
projects (0, 2006-02-08)
projects\ml402_emb_ref (0, 2006-02-08)
projects\ml402_emb_ref\genace.tcl (214, 2005-12-30)
projects\ml402_emb_ref\system.xmp (14062, 2005-12-30)
projects\ml402_emb_ref\system.mhs (21521, 2006-02-08)
projects\ml402_emb_ref\system.mss (4679, 2006-02-08)
projects\ml402_emb_ref\data (0, 2006-02-08)
projects\ml402_emb_ref\data\system.ucf (22880, 2006-02-08)
projects\ml402_emb_ref\drivers (0, 2006-02-08)
projects\ml402_emb_ref\drivers\ps2_ref_v1_00_a (0, 2006-02-08)
projects\ml402_emb_ref\drivers\ps2_ref_v1_00_a\build (0, 2006-02-08)
projects\ml402_emb_ref\drivers\ps2_ref_v1_00_a\data (0, 2006-02-08)
projects\ml402_emb_ref\drivers\ps2_ref_v1_00_a\data\ps2_ref.mdd (1557, 2005-12-30)
projects\ml402_emb_ref\drivers\ps2_ref_v1_00_a\data\ps2_ref_v2_1_0.mdd (2185, 2005-12-30)
projects\ml402_emb_ref\drivers\ps2_ref_v1_00_a\data\ps2_ref_v2_1_0.tcl (4499, 2005-12-30)
projects\ml402_emb_ref\drivers\ps2_ref_v1_00_a\examples (0, 2006-02-08)
projects\ml402_emb_ref\drivers\ps2_ref_v1_00_a\src (0, 2006-02-08)
projects\ml402_emb_ref\drivers\ps2_ref_v1_00_a\src\Makefile (1438, 2005-12-30)
projects\ml402_emb_ref\drivers\ps2_ref_v1_00_a\src\xps2.c (16960, 2005-12-30)
projects\ml402_emb_ref\drivers\ps2_ref_v1_00_a\src\xps2.h (7490, 2005-12-30)
projects\ml402_emb_ref\drivers\ps2_ref_v1_00_a\src\xps2_g.c (2485, 2005-12-30)
projects\ml402_emb_ref\drivers\ps2_ref_v1_00_a\src\xps2_i.h (3579, 2005-12-30)
projects\ml402_emb_ref\drivers\ps2_ref_v1_00_a\src\xps2_intr.c (13194, 2005-12-30)
projects\ml402_emb_ref\drivers\ps2_ref_v1_00_a\src\xps2_l.c (3436, 2005-12-30)
projects\ml402_emb_ref\drivers\ps2_ref_v1_00_a\src\xps2_l.h (9012, 2005-12-30)
projects\ml402_emb_ref\drivers\ps2_ref_v1_00_a\src\xps2_options.c (4548, 2005-12-30)
projects\ml402_emb_ref\drivers\ps2_ref_v1_00_a\src\xps2_stats.c (4018, 2005-12-30)
projects\ml402_emb_ref\drivers\tft_ref_v1_00_a (0, 2006-02-08)
projects\ml402_emb_ref\drivers\tft_ref_v1_00_a\build (0, 2006-02-08)
projects\ml402_emb_ref\drivers\tft_ref_v1_00_a\data (0, 2006-02-08)
projects\ml402_emb_ref\drivers\tft_ref_v1_00_a\data\tft_ref.mdd (1478, 2005-12-30)
projects\ml402_emb_ref\drivers\tft_ref_v1_00_a\data\tft_ref_v2_1_0.mdd (1438, 2005-12-30)
projects\ml402_emb_ref\drivers\tft_ref_v1_00_a\data\tft_ref_v2_1_0.tcl (1425, 2005-12-30)
projects\ml402_emb_ref\drivers\tft_ref_v1_00_a\examples (0, 2006-02-08)
projects\ml402_emb_ref\drivers\tft_ref_v1_00_a\src (0, 2006-02-08)
projects\ml402_emb_ref\drivers\tft_ref_v1_00_a\src\Makefile (1438, 2005-12-30)
projects\ml402_emb_ref\drivers\tft_ref_v1_00_a\src\xtft.c (6474, 2005-12-30)
projects\ml402_emb_ref\drivers\tft_ref_v1_00_a\src\xtft.h (2697, 2005-12-30)
projects\ml402_emb_ref\drivers\tft_ref_v1_00_a\src\xtft_charcode.c (174082, 2005-12-30)
... ...
ML402 Embedded MicroBlaze Reference Design
------------------------------------------
Release Version 3.1 (01/05/06)
Tool Version Requirements:
EDK 8.1 SP1
ISE 8.1 SP2
Known issues:
1) lmb_bram_if_cntlr_v1_00_b is modified slightly from the
original version that ships with EDK. The new version is in
the "pcores" directory of the reference design. The logic
change was to qualify the assertion of the BRAM enable pin to
reduce power consumption when the BRAM is not being accessed.
2) This EDK project needs to be configured for XMD software debugging
depending on what download cable is being used. Either configure
your download cable using the XPS GUI's Debug->XMD Debug Options
menu or copy the appropriate preconfigured .opt file as follows:
- To use the Platform USB Cable, copy file
"etc/xmd_microblaze_0.opt.usb" to "etc/xmd_microblaze_0.opt".
- To use the Parallel Cable 4, copy the file
"etc/xmd_microblaze_0.opt.par" to "etc/xmd_microblaze_0.opt".
3) To invoke XMD from the command line, use the command line call
"xmd -opt etc/xmd_microblaze_0.opt" from the EDK Project
Directory. Make sure the "etc/xmd_microblaze_0.opt" file is
set up correctly according to the above instructions.
4) Modifications to the design may affect timing closure in PAR.
If the design does not meeting timing, experiment with different
cost tables by changing the par "-t" option in the file
"fast_runtime.opt" or by manually running par with the "-n"
option to try multiple place and route iterations. Depending
on the design, different MAP options may also help with timing
closure.
Changes From Previous (EDK 7.1) Release
--------------------------------------------------
1) Adjust timing of USB control/data signals in "misc_logic" block
to improve data hold time to USB controller chip
2) Adjust timing of reset sequence of "opb_ac97_controller_ref"
core to ensure correct cold start up of SYNC signal.
3) Add ".opt" file option for XMD to support connection using Platform
USB Cable. See Known Issues section above.
4) Minor clean-up of text output of some software applications.
5) The opb_emc_v2_00_a and opb_sysace_v1_00_c I/O/T pin workaround
was removed
6) Update opb_gpio version to 3.01.b (3.01.a workaround removed)
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