I2C-code-Base-on--FPGA
所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：2322KB
下载次数：9
上传日期：2014-09-03 11:13:37
上 传 者：
lincy991389962
说明： 该工程文件中代码是用于实现基于FPGA的I2C的通信实验，可移植性强
(The project file code is used to implement an FPGA-based I2C communication experiment, the portability)
文件列表:
I2C code Base on FPGA\bench\CVS\Entries (14, 2005-09-23)
I2C code Base on FPGA\bench\CVS\Repository (10, 2005-09-23)
I2C code Base on FPGA\bench\CVS\Root (14, 2005-09-23)
I2C code Base on FPGA\bench\verilog\CVS\Entries (200, 2005-09-23)
I2C code Base on FPGA\bench\verilog\CVS\Repository (18, 2005-09-23)
I2C code Base on FPGA\bench\verilog\CVS\Root (14, 2005-09-23)
I2C code Base on FPGA\bench\verilog\i2c_slave_model.v (11433, 2005-11-10)
I2C code Base on FPGA\bench\verilog\i2c_slave_model.v.bak (11433, 2005-11-10)
I2C code Base on FPGA\bench\verilog\spi_slave_model.v (3948, 2005-11-10)
I2C code Base on FPGA\bench\verilog\spi_slave_model.v.bak (3949, 2005-11-10)
I2C code Base on FPGA\bench\verilog\tst_bench_top.v (14443, 2005-11-10)
I2C code Base on FPGA\bench\verilog\tst_bench_top.v.bak (14443, 2005-11-10)
I2C code Base on FPGA\bench\verilog\wb_master_model.v (5581, 2005-11-10)
I2C code Base on FPGA\bench\verilog\wb_master_model.v.bak (5581, 2005-11-10)
I2C code Base on FPGA\CVS\Entries (102, 2005-09-23)
I2C code Base on FPGA\CVS\Repository (4, 2005-09-23)
I2C code Base on FPGA\CVS\Root (14, 2005-09-23)
I2C code Base on FPGA\doc\CVS\Entries (59, 2005-09-23)
I2C code Base on FPGA\doc\CVS\Repository (8, 2005-09-23)
I2C code Base on FPGA\doc\CVS\Root (14, 2005-09-23)
I2C code Base on FPGA\doc\i2c_specs.pdf (211471, 2003-07-03)
I2C code Base on FPGA\doc\src\CVS\Entries (51, 2005-09-23)
I2C code Base on FPGA\doc\src\CVS\Repository (12, 2005-09-23)
I2C code Base on FPGA\doc\src\CVS\Root (14, 2005-09-23)
I2C code Base on FPGA\doc\src\I2C_specs.doc (464896, 2003-07-03)
I2C code Base on FPGA\rtl\CVS\Entries (25, 2005-09-23)
I2C code Base on FPGA\rtl\CVS\Repository (8, 2005-09-23)
I2C code Base on FPGA\rtl\CVS\Root (14, 2005-09-23)
I2C code Base on FPGA\rtl\verilog\CVS\Entries (259, 2005-09-23)
I2C code Base on FPGA\rtl\verilog\CVS\Repository (16, 2005-09-23)
I2C code Base on FPGA\rtl\verilog\CVS\Root (14, 2005-09-23)
I2C code Base on FPGA\rtl\verilog\i2c_master_bit_ctrl.v (17340, 2005-11-10)
I2C code Base on FPGA\rtl\verilog\i2c_master_bit_ctrl.v.bak (17340, 2005-11-10)
I2C code Base on FPGA\rtl\verilog\i2c_master_byte_ctrl.v (10577, 2005-11-10)
I2C code Base on FPGA\rtl\verilog\i2c_master_byte_ctrl.v.bak (10577, 2005-11-10)
I2C code Base on FPGA\rtl\verilog\i2c_master_defines.v (3219, 2001-11-05)
I2C code Base on FPGA\rtl\verilog\i2c_master_top.v (10506, 2005-11-30)
I2C code Base on FPGA\rtl\verilog\i2c_master_top.v.bak (10138, 2005-11-10)
I2C code Base on FPGA\rtl\verilog\timescale.v (23, 2001-09-24)
I2C code Base on FPGA\rtl\vhdl\CVS\Entries (293, 2005-09-23)
... ...
-- This code is provided for free and may be used and --
-- distributed without restriction provided that the --
-- copyright statement is not removed from the file and --
-- that any derivative work contains the original --
-- copyright notice and the associated disclaimer. --
-- Comments and suggestions are always welcome --
The i2c_master core consists of three files:
- i2c_master_top -- top level
- i2c_master_byte_ctrl -- byte controller
- i2c_master_bit_ctrl -- bit controller
VHDL needs to be compiled in order. The files are listed
above in descending order.
I2C.VHD and tst_ds1621.vhd are not supported anymore.
They remain mostly for historical purposes, altough they
might prove usefull.
Richard Herveille
rherveille@opencores.org
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