fpga_verilog_basic
所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：2825KB
下载次数：4
上传日期：2014-09-23 12:55:47
上 传 者：
fengdaweiweiwei
说明： FPGA开发板基础例程，采用verilog语言编写，经测试都很好用
(FPGA-based development board routines, using verilog language, has been tested and is very easy to use)
文件列表:
01_basic\comp\comp.asm.rpt (7828, 2014-09-23)
01_basic\comp\comp.cdf (299, 2011-12-11)
01_basic\comp\comp.done (26, 2014-09-23)
01_basic\comp\comp.fit.rpt (86700, 2014-09-23)
01_basic\comp\comp.fit.smsg (513, 2014-09-23)
01_basic\comp\comp.fit.summary (598, 2014-09-23)
01_basic\comp\comp.flow.rpt (7892, 2014-09-23)
01_basic\comp\comp.map.rpt (19764, 2014-09-23)
01_basic\comp\comp.map.summary (458, 2014-09-23)
01_basic\comp\comp.pin (27109, 2014-09-23)
01_basic\comp\comp.pof (2097362, 2014-09-23)
01_basic\comp\comp.qpf (1266, 2011-02-01)
01_basic\comp\comp.qsf (3670, 2014-09-23)
01_basic\comp\comp.qws (1126, 2011-02-01)
01_basic\comp\comp.sof (240798, 2014-09-23)
01_basic\comp\comp.sta.rpt (16558, 2014-09-23)
01_basic\comp\comp.sta.summary (223, 2014-09-23)
01_basic\comp\comp.tan.rpt (10215, 2011-02-01)
01_basic\comp\comp.tan.summary (710, 2011-02-01)
01_basic\comp\comp.v (1061, 2011-06-25)
01_basic\comp\comp.v.bak (1375, 2011-02-01)
01_basic\comp\comp_assignment_defaults.qdf (48332, 2011-06-25)
01_basic\comp\db\comp.(0).cnf.cdb (997, 2014-09-23)
01_basic\comp\db\comp.(0).cnf.hdb (733, 2014-09-23)
01_basic\comp\db\comp.amm.cdb (234, 2014-09-23)
01_basic\comp\db\comp.asm.qmsg (2242, 2014-09-23)
01_basic\comp\db\comp.asm.rdb (1446, 2014-09-23)
01_basic\comp\db\comp.asm_labs.ddb (3177, 2014-09-23)
01_basic\comp\db\comp.cbx.xml (86, 2014-09-23)
01_basic\comp\db\comp.cmp.bpm (573, 2014-09-23)
01_basic\comp\db\comp.cmp.cdb (2504, 2014-09-23)
01_basic\comp\db\comp.cmp.hdb (9440, 2014-09-23)
01_basic\comp\db\comp.cmp.kpt (216, 2014-09-23)
01_basic\comp\db\comp.cmp.logdb (4, 2014-09-23)
01_basic\comp\db\comp.cmp.rdb (12706, 2014-09-23)
01_basic\comp\db\comp.cmp0.ddb (47091, 2014-09-23)
01_basic\comp\db\comp.cmp1.ddb (46729, 2014-09-23)
01_basic\comp\db\comp.cmp2.ddb (39880, 2014-09-23)
01_basic\comp\db\comp.cmp_merge.kpt (219, 2014-09-23)
01_basic\comp\db\comp.db_info (153, 2014-08-31)
... ...
my_and:与门
my_not:非门
my_or: 或门
my_nand:与非门
my_mux: 两位数据选择器
comp: 两位数值比较器
my_decode:2-4译码器
my_encode:4线-2线编码器
half_adder: 半加器
full_adder: 全加器
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