pulse_generation
所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：4973KB
下载次数：4
上传日期：2014-10-03 17:47:36
上 传 者：
峨眉疯
说明： 一个小的激光驱动电路，调用PLL锁相环，可以产生不同脉宽，实现占空比可调
(Pulse generation, Verilog written. Though simple, but I hope you will help)
文件列表:
pulse_generation\AD_clk.qip (0, 2014-08-01)
pulse_generation\db\logic_util_heursitic.dat (0, 2014-10-03)
pulse_generation\db\PLL_1.(0).cnf.cdb (2370, 2014-10-03)
pulse_generation\db\PLL_1.(0).cnf.hdb (950, 2014-10-03)
pulse_generation\db\PLL_1.(1).cnf.cdb (1910, 2014-08-15)
pulse_generation\db\PLL_1.(1).cnf.hdb (1180, 2014-08-15)
pulse_generation\db\PLL_1.(2).cnf.cdb (1733, 2014-08-15)
pulse_generation\db\PLL_1.(2).cnf.hdb (1028, 2014-08-15)
pulse_generation\db\PLL_1.(3).cnf.cdb (1612, 2014-08-15)
pulse_generation\db\PLL_1.(3).cnf.hdb (985, 2014-08-15)
pulse_generation\db\PLL_1.cbx.xml (195, 2014-10-03)
pulse_generation\db\PLL_1.cmp.rdb (9708, 2014-10-03)
pulse_generation\db\PLL_1.cmp_merge.kpt (210, 2014-10-03)
pulse_generation\db\PLL_1.db_info (140, 2014-10-03)
pulse_generation\db\PLL_1.hier_info (2578, 2014-10-03)
pulse_generation\db\PLL_1.hif (2827, 2014-10-03)
pulse_generation\db\PLL_1.ipinfo (243, 2014-10-03)
pulse_generation\db\PLL_1.lpc.html (798, 2014-10-03)
pulse_generation\db\PLL_1.lpc.rdb (484, 2014-10-03)
pulse_generation\db\PLL_1.lpc.txt (1896, 2014-10-03)
pulse_generation\db\PLL_1.map.ammdb (123, 2014-10-03)
pulse_generation\db\PLL_1.map.bpm (663, 2014-10-03)
pulse_generation\db\PLL_1.map.cdb (4483, 2014-10-03)
pulse_generation\db\PLL_1.map.hdb (12635, 2014-10-03)
pulse_generation\db\PLL_1.map.kpt (676, 2014-10-03)
pulse_generation\db\PLL_1.map.logdb (4, 2014-10-03)
pulse_generation\db\PLL_1.map.qmsg (19912, 2014-10-03)
pulse_generation\db\PLL_1.map.rdb (1297, 2014-10-03)
pulse_generation\db\PLL_1.map_bb.cdb (1734, 2014-10-03)
pulse_generation\db\PLL_1.map_bb.hdb (10345, 2014-10-03)
pulse_generation\db\PLL_1.map_bb.logdb (4, 2014-10-03)
pulse_generation\db\PLL_1.pre_map.hdb (19727, 2014-10-03)
pulse_generation\db\PLL_1.pti_db_list.ddb (177, 2014-10-03)
pulse_generation\db\PLL_1.root_partition.map.reg_db.cdb (195, 2014-10-03)
pulse_generation\db\PLL_1.rtlv.hdb (17591, 2014-10-03)
pulse_generation\db\PLL_1.rtlv_sg.cdb (5778, 2014-10-03)
pulse_generation\db\PLL_1.rtlv_sg_swap.cdb (3461, 2014-10-03)
pulse_generation\db\PLL_1.sgdiff.cdb (3856, 2014-10-03)
pulse_generation\db\PLL_1.sgdiff.hdb (16507, 2014-10-03)
pulse_generation\db\PLL_1.sld_design_entry.sci (202, 2014-10-03)
... ...
This folder contains data for incremental compilation.
The compiled_partitions sub-folder contains previous compilation results for each partition.
As long as this folder is preserved, incremental compilation results from earlier compiles
can be re-used. To perform a clean compilation from source files for all partitions, both
the db and incremental_db folder should be removed.
The imported_partitions sub-folder contains the last imported QXP for each imported partition.
As long as this folder is preserved, imported partitions will be automatically re-imported
when the db or incremental_db/compiled_partitions folders are removed.
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