lab1_multicycle_dds
所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：3256KB
下载次数：4
上传日期：2014-12-05 13:28:05
上 传 者：
hesen199155
说明： 生成一个多周期直接信号数字合成器的Verilog代码，已在matlab中测试生成信号的频谱纯度符号要求
(Generate more than one cycle of the signal direct digital synthesizer Verilog code, has been tested symbol require spectral purity of the signal generated in matlab)
文件列表:
lab1_multicycle_dds (0, 2014-11-18)
lab1_multicycle_dds\design_file (0, 2014-11-18)
lab1_multicycle_dds\design_file\lab_top.bdf (7635, 2014-03-27)
lab1_multicycle_dds\design_file\mc_dds.v (2028, 2014-03-26)
lab1_multicycle_dds\design_file\mc_dds.v.bak (2028, 2014-03-25)
lab1_multicycle_dds\design_file\rtl_module.v (3187, 2013-11-14)
lab1_multicycle_dds\design_file\sine_rom.v (7735, 2013-11-14)
lab1_multicycle_dds\pin_de0.txt (3006, 2013-11-20)
lab1_multicycle_dds\project_q72 (0, 2014-11-26)
lab1_multicycle_dds\project_q72\cfftwinplot.m (1610, 2014-03-26)
lab1_multicycle_dds\project_q72\cnt_0to9.bsf (1791, 2014-03-26)
lab1_multicycle_dds\project_q72\cnt_en_0to9.bsf (1970, 2014-03-26)
lab1_multicycle_dds\project_q72\cnt_incr.bsf (1805, 2014-03-26)
lab1_multicycle_dds\project_q72\cnt_sync.bsf (1898, 2014-03-26)
lab1_multicycle_dds\project_q72\db (0, 2014-11-26)
lab1_multicycle_dds\project_q72\db\altsyncram_2571.tdf (9394, 2014-11-18)
lab1_multicycle_dds\project_q72\db\altsyncram_gvs3.tdf (31119, 2014-11-18)
lab1_multicycle_dds\project_q72\db\cmpr_ffc.tdf (1748, 2014-11-18)
lab1_multicycle_dds\project_q72\db\cmpr_ifc.tdf (2004, 2014-11-18)
lab1_multicycle_dds\project_q72\db\cntr_6fi.tdf (3862, 2014-11-18)
lab1_multicycle_dds\project_q72\db\cntr_gdi.tdf (3465, 2014-11-18)
lab1_multicycle_dds\project_q72\db\cntr_v7j.tdf (3958, 2014-11-18)
lab1_multicycle_dds\project_q72\db\lab_top.(0).cnf.cdb (1580, 2014-11-18)
lab1_multicycle_dds\project_q72\db\lab_top.(0).cnf.hdb (895, 2014-11-18)
lab1_multicycle_dds\project_q72\db\lab_top.(1).cnf.cdb (5542, 2014-11-18)
lab1_multicycle_dds\project_q72\db\lab_top.(1).cnf.hdb (1723, 2014-11-18)
lab1_multicycle_dds\project_q72\db\lab_top.(10).cnf.cdb (3543, 2014-11-18)
lab1_multicycle_dds\project_q72\db\lab_top.(10).cnf.hdb (2423, 2014-11-18)
lab1_multicycle_dds\project_q72\db\lab_top.(11).cnf.cdb (1337, 2014-11-18)
lab1_multicycle_dds\project_q72\db\lab_top.(11).cnf.hdb (761, 2014-11-18)
lab1_multicycle_dds\project_q72\db\lab_top.(12).cnf.cdb (1492, 2014-11-18)
lab1_multicycle_dds\project_q72\db\lab_top.(12).cnf.hdb (1387, 2014-11-18)
lab1_multicycle_dds\project_q72\db\lab_top.(13).cnf.cdb (2340, 2014-11-18)
lab1_multicycle_dds\project_q72\db\lab_top.(13).cnf.hdb (670, 2014-11-18)
lab1_multicycle_dds\project_q72\db\lab_top.(14).cnf.cdb (8244, 2014-11-18)
lab1_multicycle_dds\project_q72\db\lab_top.(14).cnf.hdb (2376, 2014-11-18)
lab1_multicycle_dds\project_q72\db\lab_top.(15).cnf.cdb (978, 2014-11-18)
lab1_multicycle_dds\project_q72\db\lab_top.(15).cnf.hdb (623, 2014-11-18)
lab1_multicycle_dds\project_q72\db\lab_top.(16).cnf.cdb (2042, 2014-11-18)
lab1_multicycle_dds\project_q72\db\lab_top.(16).cnf.hdb (768, 2014-11-18)
... ...
This folder contains data for incremental compilation.
The compiled_partitions sub-folder contains previous compilation results for each partition.
As long as this folder is preserved, incremental compilation results from earlier compiles
can be re-used. To perform a clean compilation from source files for all partitions, both
the db and incremental_db folder should be removed.
The imported_partitions sub-folder contains the last imported QXP for each imported partition.
As long as this folder is preserved, imported partitions will be automatically re-imported
when the db or incremental_db/compiled_partitions folders are removed.
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