文件列表:

Example-9-1\synplify_pro_prj\Synplify_Pro\black_box.v (516, 2002-12-05)
Example-9-1\synplify_pro_prj\Synplify_Pro\cnt60.vf (4437, 2002-12-05)
Example-9-1\synplify_pro_prj\Synplify_Pro\dcm1.v (2225, 2002-12-05)
Example-9-1\synplify_pro_prj\Synplify_Pro\decode.v (690, 2002-12-04)
Example-9-1\synplify_pro_prj\Synplify_Pro\hex2led.v (928, 2002-12-04)
Example-9-1\synplify_pro_prj\Synplify_Pro\outs3.vf (2610, 2002-12-05)
Example-9-1\synplify_pro_prj\Synplify_Pro\STMACH_V.v (2943, 2002-12-04)
Example-9-1\synplify_pro_prj\Synplify_Pro\stopwatch.vf (1407, 2002-12-05)
Example-9-1\synplify_pro_prj\Synplify_Pro\Synplify_syn\STMACH_V.plg (449, 2002-12-05)
Example-9-1\synplify_pro_prj\Synplify_Pro\Synplify_syn\STMACH_V.srd (3965, 2002-12-05)
Example-9-1\synplify_pro_prj\Synplify_Pro\Synplify_syn\stopwatch.edf (76428, 2002-12-06)
Example-9-1\synplify_pro_prj\Synplify_Pro\Synplify_syn\stopwatch.fse (0, 2002-12-06)
Example-9-1\synplify_pro_prj\Synplify_Pro\Synplify_syn\stopwatch.ncf (1104, 2002-12-06)
Example-9-1\synplify_pro_prj\Synplify_Pro\Synplify_syn\stopwatch.plg (1320, 2002-12-06)
Example-9-1\synplify_pro_prj\Synplify_Pro\Synplify_syn\stopwatch.srd (31799, 2002-12-06)
Example-9-1\synplify_pro_prj\Synplify_Pro\Synplify_syn\stopwatch.srm (46392, 2002-12-06)
Example-9-1\synplify_pro_prj\Synplify_Pro\Synplify_syn\stopwatch.srr (36355, 2002-12-06)
Example-9-1\synplify_pro_prj\Synplify_Pro\Synplify_syn\stopwatch.srs (21587, 2002-12-06)
Example-9-1\synplify_pro_prj\Synplify_Pro\Synplify_syn\stopwatch.tlg (1572, 2002-12-06)
Example-9-1\synplify_pro_prj\Synplify_Pro\Synplify_syn (0, 2007-05-05)
Example-9-1\synplify_pro_prj\Synplify_Pro\Synplify_syn_1\stopwatch.edf (76428, 2002-12-06)
Example-9-1\synplify_pro_prj\Synplify_Pro\Synplify_syn_1\stopwatch.fse (0, 2002-12-06)
Example-9-1\synplify_pro_prj\Synplify_Pro\Synplify_syn_1\stopwatch.ncf (1104, 2002-12-06)
Example-9-1\synplify_pro_prj\Synplify_Pro\Synplify_syn_1\stopwatch.plg (0, 2002-12-06)
Example-9-1\synplify_pro_prj\Synplify_Pro\Synplify_syn_1\stopwatch.srd (32157, 2002-12-06)
Example-9-1\synplify_pro_prj\Synplify_Pro\Synplify_syn_1\stopwatch.srm (46750, 2002-12-06)
Example-9-1\synplify_pro_prj\Synplify_Pro\Synplify_syn_1\stopwatch.srr (98907, 2002-12-06)
Example-9-1\synplify_pro_prj\Synplify_Pro\Synplify_syn_1\stopwatch.srs (21602, 2002-12-06)
Example-9-1\synplify_pro_prj\Synplify_Pro\Synplify_syn_1\stopwatch.tlg (1572, 2002-12-06)
Example-9-1\synplify_pro_prj\Synplify_Pro\Synplify_syn_1 (0, 2007-05-05)
Example-9-1\synplify_pro_prj\Synplify_Pro\Syn_Pro_stopwatch.prd (396, 2002-12-06)
Example-9-1\synplify_pro_prj\Synplify_Pro\Syn_Pro_stopwatch.prj (2581, 2002-12-06)
Example-9-1\synplify_pro_prj\Synplify_Pro\Syn_Pro_stopwatch.sdc (1011, 2002-12-06)
Example-9-1\synplify_pro_prj\Synplify_Pro\tenths.v (4245, 2002-12-03)
Example-9-1\synplify_pro_prj\Synplify_Pro\virtex2p.v (124059, 2002-10-25)
Example-9-1\synplify_pro_prj\Synplify_Pro (0, 2007-05-05)
Example-9-1\synplify_pro_prj\综合所需的源代码\black_box.v (516, 2002-12-05)
Example-9-1\synplify_pro_prj\综合所需的源代码\cnt60.vf (4437, 2002-12-05)
Example-9-1\synplify_pro_prj\综合所需的源代码\dcm1.v (2225, 2002-12-05)
Example-9-1\synplify_pro_prj\综合所需的源代码\decode.v (690, 2002-12-04)
... ...

WATCH_SC is a top level VHDL type project of a Stop Watch. DESIGN TYPE: Foundation ISE CONTROLS Inputs: * CLK -System clock for the Watch design. * STRTSTOP -Starts and stops the stoopwatch. This is an active-low signal which acts like the start/stop button on a runner's stop-watch. * RESET -Resets the stopwatch to 00.0 after it has been stopped. Outputs: * TENSOUT[6:0] -7-bit bus which represents the Tens digit of the stopwatch value. This bus is in 7-segment display format to be viewable on the 7-segment LED display. * ONESOUT[6:0] -similar to TENSOUT bus above, but represents the Ones digit of the stopwatch value. * TENTHSOUT[9:0] -10-bit bus which represents the Tenths digit of the stopwatch value. This bus is one-hot encoded. DESCRIPTION: * STMACH_A or STMACH_V -State Machine macro. This module uses the VSS StateCAD Editor to enter and implement the state machine. * CNT60 -Schematic-based module which counts from 0 to 59, decimal. This macro has two 4-bit outputs, which represent the 'ones' and 'tens' digits of the decimal values, respectively. * TENTHS -A LogiBLOX 10-bit, one-hot encoded counter. This macro outputs the 'tenths' digit of the watch value as a 10-bit one-hot encoded value. * HEX2LED -HDL-based macro. This macro decodes the ones and tens digit values from hexadecimal to 7-segment display format. * OUTS1, OUTS2, OUTS3 -Schematic-based macros which define the external output pin assignments for TENSOUT, ONESOUT, and TENTHSOUT output buses. SIMULATION: Behavioural and RTL Simulation done using VHDL Testbench (watch_tb.vhd).

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