Mult
所属分类：VHDL/FPGA/Verilog
开发工具：Others
文件大小：177KB
下载次数：26
上传日期：2007-06-27 15:44:05
上 传 者：
xudekai1983
说明： 这是我自己写的两个8位二进制数的乘法程序，在xilinx Spartan3E 上已经调试成功，拿出来与大家分享！
(that I wrote two eight binary number multiplication procedure, In xilinx Spartan3E debugging has been successful, with the show to share with you!)
文件列表:
Mult\Mult.ise (302495, 2006-11-08)
Mult\SUB.v (836, 2006-11-07)
Mult\SUB_tst.v (1230, 2006-11-07)
Mult\Mult.ise_ISE_Backup (302495, 2006-11-08)
Mult\Mul.v (824, 2006-11-07)
Mult\Mult_tst.v (1080, 2006-11-07)
Mult\modelsim.ini (22847, 2006-11-06)
Mult\vsim.wlf (40960, 2006-11-07)
Mult\proj.prj (1247, 2006-11-07)
Mult\proj.prd (277, 2006-11-07)
Mult\_xmsgs (0, 2007-04-22)
Mult\work\_info (896, 2006-11-07)
Mult\work\sub_cf\_primary.vhd (317, 2006-11-07)
Mult\work\sub_cf\verilog.asm (4470, 2006-11-07)
Mult\work\sub_cf\_primary.dat (480, 2006-11-07)
Mult\work\sub_cf (0, 2007-04-22)
Mult\work\@s@u@b_tst_v\_primary.vhd (78, 2006-11-07)
Mult\work\@s@u@b_tst_v\verilog.asm (5543, 2006-11-07)
Mult\work\@s@u@b_tst_v\_primary.dat (1026, 2006-11-07)
Mult\work\@s@u@b_tst_v (0, 2007-04-22)
Mult\work\@mult\_primary.vhd (271, 2006-11-07)
Mult\work\@mult\verilog.asm (4827, 2006-11-07)
Mult\work\@mult\_primary.dat (441, 2006-11-07)
Mult\work\@mult (0, 2007-04-22)
Mult\work\@mult_tst_v\_primary.vhd (80, 2006-11-07)
Mult\work\@mult_tst_v\verilog.asm (4508, 2006-11-07)
Mult\work\@mult_tst_v\_primary.dat (774, 2006-11-07)
Mult\work\@mult_tst_v (0, 2007-04-22)
Mult\work (0, 2007-04-22)
Mult\rev_2\syntax.log (5970, 2006-11-07)
Mult\rev_2\Mult_tst.srr (4207, 2006-11-07)
Mult\rev_2\Mult_tst.htm (336, 2006-11-07)
Mult\rev_2\Mult_tst.tlg (837, 2006-11-07)
Mult\rev_2\Mult_tst.srs (1380, 2006-11-07)
Mult\rev_2\Mult_tst.sap (92, 2006-11-07)
Mult\rev_2\Mult_tst.fse (0, 2006-11-07)
Mult\rev_2\Mult_tst.tap (62, 2006-11-07)
Mult\rev_2\Mult_tst.srd (1182, 2006-11-07)
Mult\rev_2\Mult_tst.srm (1220, 2006-11-07)
Mult\rev_2\Mult_tst.map (0, 2006-11-07)
... ...
近期下载者：
相关文件：
收藏者：