calculator

所属分类:VHDL/FPGA/Verilog
开发工具:Others
文件大小:21KB
下载次数:108
上传日期:2007-08-28 21:12:46
上 传 者stone_hyl
说明:  用VHDL编写的计算器,能实现简单的加减乘除四则运算

文件列表:
calculator\add.vhd (1460, 2006-11-23)
calculator\add1.vhd (1664, 2006-11-24)
calculator\div.vhd (3209, 2006-11-24)
calculator\fadd.vhd (1039, 2006-11-09)
calculator\fadd4.vhd (1174, 2006-11-09)
calculator\key_ctrl.vhd (6127, 2006-11-25)
calculator\mul.vhd (1522, 2006-11-24)
calculator\mul2.vhd (1470, 2006-11-16)
calculator\segment.vhd (3112, 2006-12-19)
calculator\sign.vhd (7105, 2006-11-25)
calculator\sub.vhd (1205, 2006-11-23)
calculator\top.bit (212461, 2006-12-19)
calculator\top.ucf (672, 2006-11-21)
calculator\top.vhd (2937, 2006-12-19)
calculator (0, 2007-03-06)

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