ADC_Ctrl

所属分类嵌入式/单片机/硬件编程
开发工具:Verilog
文件大小:193KB
下载次数:2
上传日期:2018-03-13 11:04:19
上 传 者whm454491877
说明:  ADC 驱动FPGA适合数模转换功能时序逻辑组合逻辑功能
(FPGADriving FPGA suitable for digital mode conversion function time series logic combinational logic function)

文件列表
ADC_Ctrl\prj\ADC_Ctrl.dpf, 398 , 2017-09-05
ADC_Ctrl\prj\ADC_Ctrl.qpf, 1283 , 2017-09-04
ADC_Ctrl\prj\ADC_Ctrl.qsf, 4655 , 2017-09-23
ADC_Ctrl\prj\ADC_Ctrl.qws, 48 , 2018-01-26
ADC_Ctrl\prj\ADC_Ctrl_assignment_defaults.qdf, 47539 , 2017-09-22
ADC_Ctrl\prj\db\ADC_Ctrl.db_info, 140 , 2018-01-26
ADC_Ctrl\prj\db\ADC_Ctrl.ipinfo, 163 , 2018-01-26
ADC_Ctrl\prj\db\ADC_Ctrl.sld_design_entry.sci, 277 , 2018-01-26
ADC_Ctrl\prj\db\logic_util_heursitic.dat, 17424 , 2017-09-05
ADC_Ctrl\prj\db\prev_cmp_ADC_Ctrl.qmsg, 66761 , 2017-09-05
ADC_Ctrl\prj\incremental_db\compiled_partitions\ADC_Ctrl.db_info, 140 , 2017-09-22
ADC_Ctrl\prj\incremental_db\compiled_partitions\ADC_Ctrl.root_partition.cmp.dfp, 33 , 2017-09-05
ADC_Ctrl\prj\incremental_db\compiled_partitions\ADC_Ctrl.root_partition.cmp.kpt, 205 , 2017-09-05
ADC_Ctrl\prj\incremental_db\compiled_partitions\ADC_Ctrl.root_partition.cmp.logdb, 4 , 2017-09-05
ADC_Ctrl\prj\incremental_db\compiled_partitions\ADC_Ctrl.root_partition.map.dpi, 1150 , 2017-09-05
ADC_Ctrl\prj\incremental_db\compiled_partitions\ADC_Ctrl.root_partition.map.kpt, 4515 , 2017-09-05
ADC_Ctrl\prj\incremental_db\README, 653 , 2017-09-04
ADC_Ctrl\prj\output_files\ADC_Ctrl.asm.rpt, 7519 , 2017-09-05
ADC_Ctrl\prj\output_files\ADC_Ctrl.done, 26 , 2017-09-05
ADC_Ctrl\prj\output_files\ADC_Ctrl.eda.rpt, 8093 , 2017-09-05
ADC_Ctrl\prj\output_files\ADC_Ctrl.fit.rpt, 163633 , 2017-09-05
ADC_Ctrl\prj\output_files\ADC_Ctrl.fit.smsg, 703 , 2017-09-05
ADC_Ctrl\prj\output_files\ADC_Ctrl.fit.summary, 614 , 2017-09-05
ADC_Ctrl\prj\output_files\ADC_Ctrl.flow.rpt, 8348 , 2017-09-05
ADC_Ctrl\prj\output_files\ADC_Ctrl.jdi, 227 , 2017-09-05
ADC_Ctrl\prj\output_files\ADC_Ctrl.map.rpt, 33862 , 2017-09-05
ADC_Ctrl\prj\output_files\ADC_Ctrl.map.smsg, 125 , 2017-09-05
ADC_Ctrl\prj\output_files\ADC_Ctrl.map.summary, 474 , 2017-09-05
ADC_Ctrl\prj\output_files\ADC_Ctrl.pin, 33068 , 2017-09-05
ADC_Ctrl\prj\output_files\ADC_Ctrl.sof, 358650 , 2017-09-05
ADC_Ctrl\prj\output_files\ADC_Ctrl.sta.rpt, 208058 , 2017-09-05
ADC_Ctrl\prj\output_files\ADC_Ctrl.sta.summary, 954 , 2017-09-05
ADC_Ctrl\prj\simulation\modelsim\ADC_Ctrl.sft, 353 , 2017-09-05
ADC_Ctrl\prj\simulation\modelsim\ADC_Ctrl.vo, 236278 , 2017-09-05
ADC_Ctrl\prj\simulation\modelsim\ADC_Ctrl_8_1200mv_0c_slow.vo, 236295 , 2017-09-05
ADC_Ctrl\prj\simulation\modelsim\ADC_Ctrl_8_1200mv_0c_v_slow.sdo, 191544 , 2017-09-05
ADC_Ctrl\prj\simulation\modelsim\ADC_Ctrl_8_1200mv_85c_slow.vo, 236296 , 2017-09-05
ADC_Ctrl\prj\simulation\modelsim\ADC_Ctrl_8_1200mv_85c_v_slow.sdo, 191704 , 2017-09-05
ADC_Ctrl\prj\simulation\modelsim\ADC_Ctrl_min_1200mv_0c_fast.vo, 236297 , 2017-09-05
ADC_Ctrl\prj\simulation\modelsim\ADC_Ctrl_min_1200mv_0c_v_fast.sdo, 186591 , 2017-09-05
ADC_Ctrl\prj\simulation\modelsim\ADC_Ctrl_modelsim.xrf, 29254 , 2017-09-05
ADC_Ctrl\prj\simulation\modelsim\ADC_Ctrl_v.sdo, 191704 , 2017-09-05
ADC_Ctrl\rtl\adc128s022.v, 4636 , 2017-09-04
ADC_Ctrl\rtl\ADC_Ctrl.v, 1749 , 2017-09-05
ADC_Ctrl\rtl\ADC_Ctrl.v.bak, 1426 , 2017-09-04
ADC_Ctrl\rtl\bin_bcd.v, 2101 , 2017-09-05
ADC_Ctrl\rtl\ctrl.v, 803 , 2017-09-04
ADC_Ctrl\rtl\ctrl.v.bak, 803 , 2017-09-04
ADC_Ctrl\rtl\dis.v, 2141 , 2017-09-04
ADC_Ctrl\rtl\dis.v.bak, 2141 , 2017-09-04
ADC_Ctrl\rtl\HC595.v, 2474 , 2017-09-04
ADC_Ctrl\rtl\HC595.v.bak, 2633 , 2017-09-04
ADC_Ctrl\rtl\key_filter.v, 2546 , 2017-09-04
ADC_Ctrl\rtl\key_filter.v.bak, 2579 , 2017-09-04
ADC_Ctrl\testbench\bcd_tb.v, 295 , 2017-09-05
ADC_Ctrl\prj\incremental_db\compiled_partitions, 0 , 2018-03-13
ADC_Ctrl\prj\simulation\modelsim, 0 , 2018-03-13
ADC_Ctrl\prj\db, 0 , 2018-03-13
ADC_Ctrl\prj\incremental_db, 0 , 2018-03-13
ADC_Ctrl\prj\ip, 0 , 2017-05-28
ADC_Ctrl\prj\output_files, 0 , 2018-03-13
ADC_Ctrl\prj\simulation, 0 , 2018-03-13
ADC_Ctrl\doc, 0 , 2017-05-28
ADC_Ctrl\img, 0 , 2017-05-28
ADC_Ctrl\prj, 0 , 2018-03-13
ADC_Ctrl\rtl, 0 , 2018-03-13
ADC_Ctrl\testbench, 0 , 2018-03-13
ADC_Ctrl, 0 , 2018-03-13

近期下载者

相关文件

评论我要评论

收藏者