DCT_1D
所属分类：VHDL/FPGA/Verilog
开发工具：Others
文件大小：53KB
下载次数：71
上传日期：2007-10-25 21:42:15
上 传 者：
growinarca
说明： 一维DCT变换的verilog源码，可用于JPEG算法优化的参考。程序中用到的算法称为“扭卷积”，可参考相关IEEE paper
(One-dimensional DCT transform Verilog source code can be used to optimize the JPEG algorithm reference. Procedures used in the algorithm known as the )
文件列表:
DCT_1D\add.v (150, 2007-06-16)
DCT_1D\csa4.v (1075, 2007-06-17)
DCT_1D\csa5.v (1612, 2007-06-16)
DCT_1D\csa51.v (1613, 2007-06-16)
DCT_1D\csa52.v (1615, 2007-06-16)
DCT_1D\csa6.v (1730, 2007-06-16)
DCT_1D\dct_1d.asm.rpt (7063, 2007-06-22)
DCT_1D\dct_1d.done (26, 2007-06-22)
DCT_1D\dct_1d.fit.rpt (257731, 2007-06-22)
DCT_1D\dct_1d.fit.smsg (513, 2007-06-22)
DCT_1D\dct_1d.fit.summary (489, 2007-06-22)
DCT_1D\dct_1d.flow.rpt (4348, 2007-06-22)
DCT_1D\dct_1d.map.rpt (26539, 2007-06-22)
DCT_1D\dct_1d.map.summary (381, 2007-06-22)
DCT_1D\dct_1d.pin (78369, 2007-06-22)
DCT_1D\dct_1d.qpf (901, 2007-06-22)
DCT_1D\dct_1d.qsf (2230, 2007-06-22)
DCT_1D\dct_1d.qws (1231, 2007-06-22)
DCT_1D\dct_1d.tan.rpt (205339, 2007-06-22)
DCT_1D\dct_1d.tan.summary (1670, 2007-06-22)
DCT_1D\dct_1d.v (9180, 2007-06-22)
DCT_1D\scc2.v (2337, 2007-06-22)
DCT_1D\scc4.v (5815, 2007-06-22)
DCT_1D\simulationofdct1d.vwf (27137, 2007-06-22)
DCT_1D\sub.v (148, 2007-06-16)
DCT_1D (0, 2007-10-25)
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