说明：  介绍了一种基于新型FPGA的高速数字下变频的实现方法 它充分利用数字下变频的优化算法以及FPGA领域的新技术去除由于数据速率过高而造成的各种瓶颈,极大地减少了计算量 和FPGA片内资源的消耗.
(Introduce a new type of FPGA-based high-speed digital down conversion method which realize the full advantage of digital down conversion of the optimization algorithm, as well as the field of FPGA as a result of new technology to remove data rate is too high and caused by the bottleneck, greatly reducing the computation and FPGA chip resource consumption.)