VerilogHDL_advanced_digital_design_code_Ch5
所属分类：VHDL/FPGA/Verilog
开发工具：Windows_Unix
文件大小：62KB
下载次数：14
上传日期：2007-11-27 10:12:02
上 传 者：
lianlianmao
说明： Verilog HDL 高级数字设计源码 _chapter5
(Advanced Digital Design Verilog HDL source _chapter5)
文件列表:
VerilogHDL_advanced_digital_design_code_Ch5\adder_task.v (582, 2002-06-12)
VerilogHDL_advanced_digital_design_code_Ch5\ADDVB_Models_5.doc (171008, 2004-10-12)
VerilogHDL_advanced_digital_design_code_Ch5\add_4cycle.v (489, 2002-06-12)
VerilogHDL_advanced_digital_design_code_Ch5\AOI_5_CA0.v (227, 2002-06-12)
VerilogHDL_advanced_digital_design_code_Ch5\AOI_5_CA1.v (260, 2002-06-12)
VerilogHDL_advanced_digital_design_code_Ch5\AOI_5_CA2.v (256, 2002-06-12)
VerilogHDL_advanced_digital_design_code_Ch5\AOI_5_CA3.v (259, 2002-06-12)
VerilogHDL_advanced_digital_design_code_Ch5\arithmetic_unit.v (616, 2002-06-12)
VerilogHDL_advanced_digital_design_code_Ch5\asynch_df_behav.v (362, 2002-06-12)
VerilogHDL_advanced_digital_design_code_Ch5\Auto_LFSR_ALGO.v (712, 2004-05-11)
VerilogHDL_advanced_digital_design_code_Ch5\Auto_LFSR_Param.v (563, 2002-06-12)
VerilogHDL_advanced_digital_design_code_Ch5\Auto_LFSR_RTL.v (842, 2002-06-12)
VerilogHDL_advanced_digital_design_code_Ch5\barrel_shifter.v (420, 2002-06-12)
VerilogHDL_advanced_digital_design_code_Ch5\comparator.v (582, 2002-06-12)
VerilogHDL_advanced_digital_design_code_Ch5\compare_2_algo.v (409, 2002-06-12)
VerilogHDL_advanced_digital_design_code_Ch5\compare_2_CA0.v (410, 2002-06-12)
VerilogHDL_advanced_digital_design_code_Ch5\compare_2_CA1.txt (267, 2002-06-12)
VerilogHDL_advanced_digital_design_code_Ch5\compare_2_CA1.v (216, 2002-06-12)
VerilogHDL_advanced_digital_design_code_Ch5\compare_2_ROM.v (888, 2001-01-10)
VerilogHDL_advanced_digital_design_code_Ch5\compare_2_RTL.v (332, 2002-06-12)
VerilogHDL_advanced_digital_design_code_Ch5\compare_32_CA.v (287, 2002-06-12)
VerilogHDL_advanced_digital_design_code_Ch5\decoder.v (950, 2002-06-12)
VerilogHDL_advanced_digital_design_code_Ch5\df_behav.v (332, 2002-06-12)
VerilogHDL_advanced_digital_design_code_Ch5\encoder.v (960, 2002-06-12)
VerilogHDL_advanced_digital_design_code_Ch5\find_first_one.v (386, 2002-06-12)
VerilogHDL_advanced_digital_design_code_Ch5\Hex_Keypad_Grayhill_072.v (2675, 2004-10-12)
VerilogHDL_advanced_digital_design_code_Ch5\Latch_CA.v (149, 2002-06-12)
VerilogHDL_advanced_digital_design_code_Ch5\Latch_Rbar_CA.v (181, 2002-06-12)
VerilogHDL_advanced_digital_design_code_Ch5\Majority.v (395, 2002-06-12)
VerilogHDL_advanced_digital_design_code_Ch5\Majority_4b.v (237, 2002-06-12)
VerilogHDL_advanced_digital_design_code_Ch5\Mux_4_32_CA.v (435, 2001-01-26)
VerilogHDL_advanced_digital_design_code_Ch5\Mux_4_32_case.v (557, 2001-01-26)
VerilogHDL_advanced_digital_design_code_Ch5\Mux_4_32_if.v (577, 2001-01-26)
VerilogHDL_advanced_digital_design_code_Ch5\Par_load_reg4.v (399, 2004-10-12)
VerilogHDL_advanced_digital_design_code_Ch5\pipe_2stage.v (1860, 2001-10-22)
VerilogHDL_advanced_digital_design_code_Ch5\priority.v (986, 2002-06-12)
VerilogHDL_advanced_digital_design_code_Ch5\Register_File.v (561, 2002-06-12)
VerilogHDL_advanced_digital_design_code_Ch5\ring_counter.v (340, 2002-06-12)
VerilogHDL_advanced_digital_design_code_Ch5\Row_Signal.v (649, 2005-07-05)
VerilogHDL_advanced_digital_design_code_Ch5\Seven_Seg_Display.v (1036, 2002-06-12)
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