ata.tar
所属分类：VHDL/FPGA/Verilog
开发工具：Others
文件大小：813KB
下载次数：31
上传日期：2008-02-16 12:01:56
上 传 者：
zgliu799
说明： 硬盘接口的硬件实现，VHDL和Verilog是吸纳的，带有文档！
(Hard disk interface hardware implementation, VHDL and Verilog is absorbed with documentation!)
文件列表:
ata (0, 2007-11-08)
ata\syn (0, 2007-11-08)
ata\syn\log (0, 2007-11-08)
ata\syn\out (0, 2007-11-08)
ata\syn\bin (0, 2007-11-08)
ata\syn\bin\lib_spec.dc (1123, 2001-08-16)
ata\syn\bin\design_spec.dc (659, 2001-08-16)
ata\syn\bin\comp.dc (3875, 2001-08-16)
ata\syn\bin\read.dc (1877, 2001-08-16)
ata\syn\run (0, 2007-11-08)
ata\documentation (0, 2007-11-08)
ata\sim (0, 2007-11-08)
ata\sim\gate_sim (0, 2007-11-08)
ata\sim\gate_sim\bin (0, 2007-11-08)
ata\sim\gate_sim\run (0, 2007-11-08)
ata\sim\rtl_sim (0, 2007-11-08)
ata\sim\rtl_sim\bin (0, 2007-11-08)
ata\sim\rtl_sim\bin\Makefile (3159, 2001-08-16)
ata\sim\rtl_sim\run (0, 2007-11-08)
ata\verilog (0, 2007-11-08)
ata\verilog\ocidec-1 (0, 2007-11-08)
ata\rtl (0, 2007-11-08)
ata\rtl\verilog (0, 2007-11-08)
ata\rtl\verilog\ocidec-2 (0, 2007-11-08)
ata\rtl\verilog\ocidec-2\atahost_top.v (9889, 2002-02-18)
ata\rtl\verilog\ocidec-2\atahost_controller.v (8410, 2002-05-19)
ata\rtl\verilog\ocidec-2\revision_history.txt (404, 2002-05-19)
ata\rtl\verilog\ocidec-2\ud_cnt.v (4166, 2002-02-18)
ata\rtl\verilog\ocidec-2\ro_cnt.v (4154, 2002-02-18)
ata\rtl\verilog\ocidec-2\atahost_wb_slave.v (16177, 2002-02-18)
ata\rtl\verilog\ocidec-2\atahost_pio_actrl.v (6521, 2002-02-18)
ata\rtl\verilog\ocidec-2\timescale.v (23, 2002-02-18)
ata\rtl\verilog\ocidec-2\atahost_pio_tctrl.v (8328, 2002-02-18)
ata\rtl\verilog\ocidec-1 (0, 2007-11-08)
ata\rtl\verilog\ocidec-1\atahost_top.v (10189, 2002-02-18)
ata\rtl\verilog\ocidec-1\atahost_controller.v (8185, 2002-05-19)
ata\rtl\verilog\ocidec-1\revision_history.txt (2673, 2002-05-19)
ata\rtl\verilog\ocidec-1\ud_cnt.v (4055, 2002-02-16)
ata\rtl\verilog\ocidec-1\ro_cnt.v (4043, 2002-02-16)
ata\rtl\verilog\ocidec-1\atahost_wb_slave.v (16245, 2002-02-18)
... ...
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