verilog

所属分类:VHDL/FPGA/Verilog
开发工具:Others
文件大小:1514KB
下载次数:217
上传日期:2008-02-22 15:17:31
上 传 者tang8407
说明:  北大微电子学系于敦山老师的课件,介绍Verilog HDL、Cadence Verilog仿真器、可综合的Verilog HDL、设计举例、自动布局布线工具、Verilog的词汇约定等内容
(Department of Microelectronics, Peking University in the teacher s courseware mts on Verilog HDL, Cadence Verilog simulator can be integrated Verilog HDL, design, for example, automatic placement and routing tools, Verilog, etc. terms agreed)

文件列表:
北大verilog课件\1-5.ppt (553472, 2007-05-01)
北大verilog课件\10-13.ppt (763392, 2007-05-01)
北大verilog课件\14-16.ppt (245248, 2007-05-01)
北大verilog课件\17-22.ppt (656896, 2007-05-01)
北大verilog课件\6-9.ppt (703488, 2007-05-01)
北大verilog课件 (0, 2007-12-18)

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